RDMA/bnxt_re: Fix FRMR issue with single page MR allocation
authorSelvin Xavier <selvin.xavier@broadcom.com>
Wed, 15 Sep 2021 12:32:39 +0000 (05:32 -0700)
committerJason Gunthorpe <jgg@nvidia.com>
Mon, 20 Sep 2021 16:37:02 +0000 (13:37 -0300)
When the FRMR is allocated with single page, driver is attempting to
create a level 0 HWQ and not allocating any page because the nopte field
is set. This causes the crash during post_send as the pbl is not
populated.

To avoid this crash, check for the nopte bit during HWQ creation with
single page and create a level 1 page table and populate the pbl address
correctly.

Link: https://lore.kernel.org/r/1631709163-2287-9-git-send-email-selvin.xavier@broadcom.com
Reviewed-by: Leon Romanovsky <leonro@nvidia.com>
Signed-off-by: Selvin Xavier <selvin.xavier@broadcom.com>
Signed-off-by: Jason Gunthorpe <jgg@nvidia.com>
drivers/infiniband/hw/bnxt_re/qplib_res.c

index 44282a8cdd4f257842b36b683c1d2d20fa8b0e1b..bf49363f590e6d8ccc2c7930467de6d615bf3e3b 100644 (file)
@@ -228,15 +228,16 @@ int bnxt_qplib_alloc_init_hwq(struct bnxt_qplib_hwq *hwq,
                                npages++;
        }
 
-       if (npages == MAX_PBL_LVL_0_PGS) {
+       if (npages == MAX_PBL_LVL_0_PGS && !hwq_attr->sginfo->nopte) {
                /* This request is Level 0, map PTE */
                rc = __alloc_pbl(res, &hwq->pbl[PBL_LVL_0], hwq_attr->sginfo);
                if (rc)
                        goto fail;
                hwq->level = PBL_LVL_0;
+               goto done;
        }
 
-       if (npages > MAX_PBL_LVL_0_PGS) {
+       if (npages >= MAX_PBL_LVL_0_PGS) {
                if (npages > MAX_PBL_LVL_1_PGS) {
                        u32 flag = (hwq_attr->type == HWQ_TYPE_L2_CMPL) ?
                                    0 : PTU_PTE_VALID;