arm64: cpufeature: add TCR2 cpucap
authorJoey Gouly <joey.gouly@arm.com>
Tue, 6 Jun 2023 14:58:45 +0000 (15:58 +0100)
committerCatalin Marinas <catalin.marinas@arm.com>
Tue, 6 Jun 2023 15:52:40 +0000 (16:52 +0100)
This capability indicates if the system supports the TCR2_ELx system register.

Signed-off-by: Joey Gouly <joey.gouly@arm.com>
Cc: Will Deacon <will@kernel.org>
Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Reviewed-by: Mark Brown <broonie@kernel.org>
Link: https://lore.kernel.org/r/20230606145859.697944-7-joey.gouly@arm.com
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
arch/arm64/kernel/cpufeature.c
arch/arm64/tools/cpucaps

index 416c794207c123f06968782a971bdba053c17faa..12107c07fb77ba71f559fc50c13566facca4e230 100644 (file)
@@ -2674,6 +2674,12 @@ static const struct arm64_cpu_capabilities arm64_features[] = {
                .cpu_enable = cpu_enable_mops,
                ARM64_CPUID_FIELDS(ID_AA64ISAR2_EL1, MOPS, IMP)
        },
+       {
+               .capability = ARM64_HAS_TCR2,
+               .type = ARM64_CPUCAP_SYSTEM_FEATURE,
+               .matches = has_cpuid_feature,
+               ARM64_CPUID_FIELDS(ID_AA64MMFR3_EL1, TCRX, IMP)
+       },
        {},
 };
 
index debc4609f129aea7a52e2a85f7a7e3291bd40399..ebf5d4407b645d07e49ef457e873b3fde761aa73 100644 (file)
@@ -44,6 +44,7 @@ HAS_RAS_EXTN
 HAS_RNG
 HAS_SB
 HAS_STAGE2_FWB
+HAS_TCR2
 HAS_TIDCP1
 HAS_TLB_RANGE
 HAS_VIRT_HOST_EXTN