drm/amd/display: Block z-states when stutter period exceeds criteria
authorNicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Tue, 7 Dec 2021 17:58:07 +0000 (12:58 -0500)
committerAlex Deucher <alexander.deucher@amd.com>
Thu, 30 Dec 2021 13:54:44 +0000 (08:54 -0500)
[Why]
Stutter period won't be less than 5000.0, but if PSR is enabled then we
can potentially enter Z9 when MPO is enabled.

SMU will try to enter Z9 too early in these cases (before PSR is
enabled) and we'll see underflow.

[How]
Block z-states (z9, z10) until we can add a new interface to SMU to
signal when we can support z10 but not z9.

We can revert this once the interface change is in.

Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Reviewed-by: Eric Yang <Eric.Yang2@amd.com>
Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c

index 40b122a708ef2bf3c918d58c81fe3e578914a08a..2a72517e2b28173eb1edf713291db469579afcd9 100644 (file)
@@ -3093,8 +3093,7 @@ static enum dcn_zstate_support_state  decide_zstate_support(struct dc *dc, struc
        else if (context->stream_count == 1 &&  context->streams[0]->signal == SIGNAL_TYPE_EDP) {
                struct dc_link *link = context->streams[0]->sink->link;
 
-               if ((link->link_index == 0 && link->psr_settings.psr_feature_enabled)
-                               || context->bw_ctx.dml.vba.StutterPeriod > 5000.0)
+               if (link->link_index == 0 && context->bw_ctx.dml.vba.StutterPeriod > 5000.0)
                        return DCN_ZSTATE_SUPPORT_ALLOW;
                else
                        return DCN_ZSTATE_SUPPORT_DISALLOW;