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dmaengine: dw-axi-dmac: set coherent mask
author
Pandith N
<pandith.n@intel.com>
Fri, 1 Oct 2021 14:08:12 +0000
(19:38 +0530)
committer
Vinod Koul
<vkoul@kernel.org>
Mon, 18 Oct 2021 06:44:20 +0000
(12:14 +0530)
Add support for setting dma coherent mask, dma mask is set to 64 bit
Signed-off-by: Pandith N <pandith.n@intel.com>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Link:
https://lore.kernel.org/r/20211001140812.24977-4-pandith.n@intel.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c
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diff --git
a/drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c
b/drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c
index f46fd9895a13a1820df77324dc22e274d7b7406e..79572ec532ef22e2792f781caf3d06301596ce0d 100644
(file)
--- a/
drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c
+++ b/
drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c
@@
-212,12
+212,16
@@
static inline bool axi_chan_is_hw_enable(struct axi_dma_chan *chan)
static void axi_dma_hw_init(struct axi_dma_chip *chip)
{
+ int ret;
u32 i;
for (i = 0; i < chip->dw->hdata->nr_channels; i++) {
axi_chan_irq_disable(&chip->dw->chan[i], DWAXIDMAC_IRQ_ALL);
axi_chan_disable(&chip->dw->chan[i]);
}
+ ret = dma_set_mask_and_coherent(chip->dev, DMA_BIT_MASK(64));
+ if (ret)
+ dev_warn(chip->dev, "Unable to set coherent mask\n");
}
static u32 axi_chan_get_xfer_width(struct axi_dma_chan *chan, dma_addr_t src,