usb: dwc3: Add workaround for host mode VBUS glitch when boot
authorRan Wang <ran.wang_1@nxp.com>
Wed, 24 Jan 2024 15:25:25 +0000 (10:25 -0500)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Sun, 28 Jan 2024 01:39:09 +0000 (17:39 -0800)
When DWC3 is set to host mode by programming register DWC3_GCTL, VBUS
(or its control signal) will be turned on immediately on related Root Hub
ports. Then, the VBUS is turned off for a little while(15us) when do xhci
reset (conducted by xhci driver) and back to normal finally, we can
observe a negative glitch of related signal happen.

This VBUS glitch might cause some USB devices enumeration fail if kernel
boot with them connected. Such as LS1012AFWRY/LS1043ARDB/LX2160AQDS
/LS1088ARDB with Kingston 16GB USB2.0/Kingston USB3.0/JetFlash Transcend
4GB USB2.0 drives. The fail cases include enumerated as full-speed device
or report wrong device descriptor, etc.

One SW workaround which can fix this is by programing all xhci PORTSC[PP]
to 0 to turn off VBUS immediately after setting host mode in DWC3 driver
(per signal measurement result, it will be too late to do it in
xhci-plat.c or xhci.c). Then, after xhci reset complete in xhci driver,
PORTSC[PP]s' value will back to 1 automatically and VBUS on at that time,
no glitch happen and normal enumeration process has no impact.

Acked-by: Thinh Nguyen <Thinh.Nguyen@synopsys.com>
Signed-off-by: Ran Wang <ran.wang_1@nxp.com>
Reviewed-by: Peter Chen <peter.chen@nxp.com>
Signed-off-by: Frank Li <Frank.Li@nxp.com>
Link: https://lore.kernel.org/r/20240124152525.3910311-4-Frank.Li@nxp.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
drivers/usb/dwc3/core.c
drivers/usb/dwc3/core.h
drivers/usb/dwc3/host.c

index 3e55838c0001443845d975d297dcf25877fe34d5..3b68e8e45b8b9ae8490aaf874456966bf96c77a3 100644 (file)
@@ -1626,6 +1626,9 @@ static void dwc3_get_properties(struct dwc3 *dwc)
        dwc->dis_split_quirk = device_property_read_bool(dev,
                                "snps,dis-split-quirk");
 
+       dwc->host_vbus_glitches_quirk = device_property_read_bool(dev,
+                               "snps,host-vbus-glitches-quirk");
+
        dwc->lpm_nyet_threshold = lpm_nyet_threshold;
        dwc->tx_de_emphasis = tx_de_emphasis;
 
index e3eea965e57bfd3d32fa6b1cb52fd4072734a30d..df544ec730d222c0e4fba6b398f6a7feca8d2161 100644 (file)
@@ -1132,6 +1132,7 @@ struct dwc3_scratchpad_array {
  *     2       - No de-emphasis
  *     3       - Reserved
  * @dis_metastability_quirk: set to disable metastability quirk.
+ * @host_vbus_glitches_quirk: set to avoid vbus glitch during xhci reset.
  * @dis_split_quirk: set to disable split boundary.
  * @wakeup_configured: set if the device is configured for remote wakeup.
  * @suspended: set to track suspend event due to U3/L2.
@@ -1353,6 +1354,7 @@ struct dwc3 {
        unsigned                tx_de_emphasis:2;
 
        unsigned                dis_metastability_quirk:1;
+       unsigned                host_vbus_glitches_quirk:1;
 
        unsigned                dis_split_quirk:1;
        unsigned                async_callbacks:1;
index 61f57fe5bb783bcf676cdb47177c66bb2a2e81be..4957b9765dc5670a8f5ff9d090896a88d242622a 100644 (file)
 #include <linux/of.h>
 #include <linux/platform_device.h>
 
+#include "../host/xhci-port.h"
+#include "../host/xhci-ext-caps.h"
+#include "../host/xhci-caps.h"
 #include "core.h"
 
+#define XHCI_HCSPARAMS1                0x4
+#define XHCI_PORTSC_BASE       0x400
+
+/**
+ * dwc3_power_off_all_roothub_ports - Power off all Root hub ports
+ * @dwc: Pointer to our controller context structure
+ */
+static void dwc3_power_off_all_roothub_ports(struct dwc3 *dwc)
+{
+       void __iomem *xhci_regs;
+       u32 op_regs_base;
+       int port_num;
+       u32 offset;
+       u32 reg;
+       int i;
+
+       /* xhci regs is not mapped yet, do it temperary here */
+       if (dwc->xhci_resources[0].start) {
+               xhci_regs = ioremap(dwc->xhci_resources[0].start, DWC3_XHCI_REGS_END);
+               if (IS_ERR(xhci_regs)) {
+                       dev_err(dwc->dev, "Failed to ioremap xhci_regs\n");
+                       return;
+               }
+
+               op_regs_base = HC_LENGTH(readl(xhci_regs));
+               reg = readl(xhci_regs + XHCI_HCSPARAMS1);
+               port_num = HCS_MAX_PORTS(reg);
+
+               for (i = 1; i <= port_num; i++) {
+                       offset = op_regs_base + XHCI_PORTSC_BASE + 0x10 * (i - 1);
+                       reg = readl(xhci_regs + offset);
+                       reg &= ~PORT_POWER;
+                       writel(reg, xhci_regs + offset);
+               }
+
+               iounmap(xhci_regs);
+       } else {
+               dev_err(dwc->dev, "xhci base reg invalid\n");
+       }
+}
+
 static void dwc3_host_fill_xhci_irq_res(struct dwc3 *dwc,
                                        int irq, char *name)
 {
@@ -66,6 +110,13 @@ int dwc3_host_init(struct dwc3 *dwc)
        int                     ret, irq;
        int                     prop_idx = 0;
 
+       /*
+        * Some platforms need to power off all Root hub ports immediately after DWC3 set to host
+        * mode to avoid VBUS glitch happen when xhci get reset later.
+        */
+       if (dwc->host_vbus_glitches_quirk)
+               dwc3_power_off_all_roothub_ports(dwc);
+
        irq = dwc3_host_get_irq(dwc);
        if (irq < 0)
                return irq;