powercap: intel_rapl: fix UBSAN shift-out-of-bounds issue

When value < time_unit, the parameter of ilog2() will be zero and
the return value is -1. u64(-1) is too large for shift exponent
and then will trigger shift-out-of-bounds:

shift exponent 18446744073709551615 is too large for 32-bit type 'int'
Call Trace:
 rapl_compute_time_window_core
 rapl_write_data_raw
 set_time_window
 store_constraint_time_window_us

Signed-off-by: Chao Qin <chao.qin@intel.com>
Acked-by: Zhang Rui <rui.zhang@intel.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>

diff --git a/drivers/powercap/intel_rapl_common.c b/drivers/powercap/intel_rapl_common.c
index 6812c1ca31000397fa875ad2289acca20a2f69d8..4688d0647b22566cd462b61e3266554bf9e648dc 100644 (file)
--- a/drivers/powercap/intel_rapl_common.c
+++ b/drivers/powercap/intel_rapl_common.c
@@ -994,6 +994,9 @@ static u64 rapl_compute_time_window_core(struct rapl_package *rp, u64 value,
                y = value & 0x1f;
                value = (1 << y) * (4 + f) * rp->time_unit / 4;
        } else {
+               if (value < rp->time_unit)
+                       return 0;
+
                do_div(value, rp->time_unit);
                y = ilog2(value);
                f = div64_u64(4 * (value - (1 << y)), 1 << y);