arm64: xilinx: Put ethernet phys to mdio node

All zynqmp boards have been already described via mdio node that's why also
convert zc1751. With using mdio node there is an option to add reset
property for the whole mdio bus.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/dc228a27579b48f3e768fcb439d118b4a0f0ef5b.1695040866.git.michal.simek@amd.com

diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm015-dc1.dts b/arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm015-dc1.dts
index e821d55d8d5a89d5ff509c82855c61351c4ae305..73491626e01e657e8c041b8dc83283673ef98cf0 100644 (file)
--- a/arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm015-dc1.dts
+++ b/arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm015-dc1.dts
@@ -98,8 +98,12 @@
        phy-mode = "rgmii-id";
        pinctrl-names = "default";
        pinctrl-0 = <&pinctrl_gem3_default>;
-       phy0: ethernet-phy@0 {
-               reg = <0>;
+       mdio: mdio {
+               #address-cells = <1>;
+               #size-cells = <0>;
+               phy0: ethernet-phy@0 {
+                       reg = <0>;
+               };
        };
 };
 

diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm016-dc2.dts b/arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm016-dc2.dts
index b59e11316b4be0a36b1a5f266d17f2f1bdf1a0d3..f767708fb50d92b5a192e78894a6aaf08f69e587 100644 (file)
--- a/arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm016-dc2.dts
+++ b/arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm016-dc2.dts
@@ -91,12 +91,16 @@
        phy-mode = "rgmii-id";
        pinctrl-names = "default";
        pinctrl-0 = <&pinctrl_gem2_default>;
-       phy0: ethernet-phy@5 {
-               reg = <5>;
-               ti,rx-internal-delay = <0x8>;
-               ti,tx-internal-delay = <0xa>;
-               ti,fifo-depth = <0x1>;
-               ti,dp83867-rxctrl-strap-quirk;
+       mdio: mdio {
+               #address-cells = <1>;
+               #size-cells = <0>;
+               phy0: ethernet-phy@5 {
+                       reg = <5>;
+                       ti,rx-internal-delay = <0x8>;
+                       ti,tx-internal-delay = <0xa>;
+                       ti,fifo-depth = <0x1>;
+                       ti,dp83867-rxctrl-strap-quirk;
+               };
        };
 };
 

diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm017-dc3.dts b/arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm017-dc3.dts
index 38b0a312171b70b7cb0147f754d1be8d8f7edb5f..f553b317e6b2a55e3155ac603f898b7a746f3247 100644 (file)
--- a/arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm017-dc3.dts
+++ b/arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm017-dc3.dts
@@ -88,8 +88,12 @@
        status = "okay";
        phy-handle = <&phy0>;
        phy-mode = "rgmii-id";
-       phy0: ethernet-phy@0 { /* VSC8211 */
-               reg = <0>;
+       mdio: mdio {
+               #address-cells = <1>;
+               #size-cells = <0>;
+               phy0: ethernet-phy@0 { /* VSC8211 */
+                       reg = <0>;
+               };
        };
 };
 

diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm018-dc4.dts b/arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm018-dc4.dts
index 6636e76545a5d9f977dbcc5755da6b427e1aa612..6ec1d9813973c43a9ef4f16941069fdb0ccf4d4f 100644 (file)
--- a/arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm018-dc4.dts
+++ b/arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm018-dc4.dts
@@ -116,17 +116,21 @@
        status = "okay";
        phy-mode = "rgmii-id";
        phy-handle = <&ethernet_phy0>;
-       ethernet_phy0: ethernet-phy@0 { /* Marvell 88e1512 */
-               reg = <0>;
-       };
-       ethernet_phy7: ethernet-phy@7 { /* Vitesse VSC8211 */
-               reg = <7>;
-       };
-       ethernet_phy3: ethernet-phy@3 { /* Realtek RTL8211DN */
-               reg = <3>;
-       };
-       ethernet_phy8: ethernet-phy@8 { /* Vitesse VSC8211 */
-               reg = <8>;
+       mdio: mdio {
+               #address-cells = <1>;
+               #size-cells = <0>;
+               ethernet_phy0: ethernet-phy@0 { /* Marvell 88e1512 */
+                       reg = <0>;
+               };
+               ethernet_phy7: ethernet-phy@7 { /* Vitesse VSC8211 */
+                       reg = <7>;
+               };
+               ethernet_phy3: ethernet-phy@3 { /* Realtek RTL8211DN */
+                       reg = <3>;
+               };
+               ethernet_phy8: ethernet-phy@8 { /* Vitesse VSC8211 */
+                       reg = <8>;
+               };
        };
 };
 

diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm019-dc5.dts b/arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm019-dc5.dts
index 0d2ea9c09a0a0198a7a5571efeea7cce00791dce..b1857e17ab7e8b95d62f03c60139a7e5bb8149ac 100644 (file)
--- a/arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm019-dc5.dts
+++ b/arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm019-dc5.dts
@@ -77,8 +77,12 @@
        phy-mode = "rgmii-id";
        pinctrl-names = "default";
        pinctrl-0 = <&pinctrl_gem1_default>;
-       phy0: ethernet-phy@0 {
-               reg = <0>;
+       mdio: mdio {
+               #address-cells = <1>;
+               #size-cells = <0>;
+               phy0: ethernet-phy@0 {
+                       reg = <0>;
+               };
        };
 };