drivers/perf: hisi: use the correct HiSilicon copyright
authorHao Fang <fanghao11@huawei.com>
Sat, 22 May 2021 10:23:57 +0000 (18:23 +0800)
committerWill Deacon <will@kernel.org>
Tue, 1 Jun 2021 13:18:47 +0000 (14:18 +0100)
s/Hisilicon/HiSilicon/.
It should use capital S, according to the official website
https://www.hisilicon.com/en.

Signed-off-by: Hao Fang <fanghao11@huawei.com>
Link: https://lore.kernel.org/r/1621679037-15323-1-git-send-email-fanghao11@huawei.com
Signed-off-by: Will Deacon <will@kernel.org>
drivers/perf/hisilicon/hisi_uncore_ddrc_pmu.c
drivers/perf/hisilicon/hisi_uncore_hha_pmu.c
drivers/perf/hisilicon/hisi_uncore_l3c_pmu.c
drivers/perf/hisilicon/hisi_uncore_pmu.c
drivers/perf/hisilicon/hisi_uncore_pmu.h
drivers/perf/hisilicon/hisi_uncore_sllc_pmu.c

index 0c7777bf1542db5c75c1e3cec9c3e2950aaa76d5..62299ab5a9be983cef3adea603bfd7d0134c0417 100644 (file)
@@ -2,7 +2,7 @@
 /*
  * HiSilicon SoC DDRC uncore Hardware event counters support
  *
- * Copyright (C) 2017 Hisilicon Limited
+ * Copyright (C) 2017 HiSilicon Limited
  * Author: Shaokun Zhang <zhangshaokun@hisilicon.com>
  *         Anurup M <anurup.m@huawei.com>
  *
index 12eb41ab1b8af43473fbf06f3e656da892fa43c5..12b2c5e6d488d7f14e4876ccc88a7deacfde6036 100644 (file)
@@ -2,7 +2,7 @@
 /*
  * HiSilicon SoC HHA uncore Hardware event counters support
  *
- * Copyright (C) 2017 Hisilicon Limited
+ * Copyright (C) 2017 HiSilicon Limited
  * Author: Shaokun Zhang <zhangshaokun@hisilicon.com>
  *         Anurup M <anurup.m@huawei.com>
  *
index 773f69538090d65dbee9113f10e87d2039c14d43..560ab964c8b5967052788b8e9e9729691df57fe5 100644 (file)
@@ -2,7 +2,7 @@
 /*
  * HiSilicon SoC L3C uncore Hardware event counters support
  *
- * Copyright (C) 2017 Hisilicon Limited
+ * Copyright (C) 2017 HiSilicon Limited
  * Author: Anurup M <anurup.m@huawei.com>
  *         Shaokun Zhang <zhangshaokun@hisilicon.com>
  *
index 5842593632e432b8619d4239e245af4acdef5e05..a738aeab5c04985f1fe6b7cf4b21eeb312d50511 100644 (file)
@@ -2,7 +2,7 @@
 /*
  * HiSilicon SoC Hardware event counters support
  *
- * Copyright (C) 2017 Hisilicon Limited
+ * Copyright (C) 2017 HiSilicon Limited
  * Author: Anurup M <anurup.m@huawei.com>
  *         Shaokun Zhang <zhangshaokun@hisilicon.com>
  *
index ea9d89bbc1ea0559fd1d6a7a36486d02407bb583..7f5841d6f59246d72f08677466cf6096c8fa978a 100644 (file)
@@ -2,7 +2,7 @@
 /*
  * HiSilicon SoC Hardware event counters support
  *
- * Copyright (C) 2017 Hisilicon Limited
+ * Copyright (C) 2017 HiSilicon Limited
  * Author: Anurup M <anurup.m@huawei.com>
  *         Shaokun Zhang <zhangshaokun@hisilicon.com>
  *
index 835ec3e2178feb75e82079538a745034781fdc5a..08e028d9a40654e33e1cb3d58305bcafdc34ad93 100644 (file)
@@ -2,7 +2,7 @@
 /*
  * HiSilicon SLLC uncore Hardware event counters support
  *
- * Copyright (C) 2020 Hisilicon Limited
+ * Copyright (C) 2020 HiSilicon Limited
  * Author: Shaokun Zhang <zhangshaokun@hisilicon.com>
  *
  * This code is based on the uncore PMUs like arm-cci and arm-ccn.