The level1 PBL info address is stored as u64. This requires casting
through a uinptr_t before used as a pointer type.
And this leads to sparse warning such as this when uinptr_t is missing:
drivers/infiniband/hw/irdma/hw.c: In function 'irdma_destroy_virt_aeq':
drivers/infiniband/hw/irdma/hw.c:579:23: warning: cast to pointer from integer of different size [-Wint-to-pointer-cast]
579 | dma_addr_t *pg_arr = (dma_addr_t *)aeq->palloc.level1.addr;
This can be fixed using an intermediate uintptr_t, but rather it is better
to fix the structure irdm_pble_info to store the address as u64* and the
VA it is assigned in irdma_chunk as a void*. This greatly reduces the
casting on this address.
Fixes: 44d9e52977a1 ("RDMA/irdma: Implement device initialization definitions")
Link: https://lore.kernel.org/r/20210609234924.938-1-shiraz.saleem@intel.com
Reported-by: kernel test robot <lkp@intel.com>
Signed-off-by: Shiraz Saleem <shiraz.saleem@intel.com>
Signed-off-by: Jason Gunthorpe <jgg@nvidia.com>
return status;
}
- pg_arr = (dma_addr_t *)(uintptr_t)aeq->palloc.level1.addr;
+ pg_arr = (dma_addr_t *)aeq->palloc.level1.addr;
status = irdma_map_vm_page_list(&rf->hw, aeq->mem.va, pg_arr, pg_cnt);
if (status) {
irdma_free_pble(rf->pble_rsrc, &aeq->palloc);
offset = idx->rel_pd_idx << HMC_PAGED_BP_SHIFT;
chunk->size = info->pages << HMC_PAGED_BP_SHIFT;
- chunk->vaddr = (uintptr_t)sd_entry->u.bp.addr.va + offset;
+ chunk->vaddr = sd_entry->u.bp.addr.va + offset;
chunk->fpm_addr = pble_rsrc->next_fpm_addr;
ibdev_dbg(to_ibdev(dev),
- "PBLE: chunk_size[%lld] = 0x%llx vaddr=0x%llx fpm_addr = %llx\n",
+ "PBLE: chunk_size[%lld] = 0x%llx vaddr=0x%pK fpm_addr = %llx\n",
chunk->size, chunk->size, chunk->vaddr, chunk->fpm_addr);
return 0;
if (status)
goto error;
- addr = (u8 *)(uintptr_t)chunk->vaddr;
+ addr = chunk->vaddr;
for (i = 0; i < info->pages; i++) {
mem.pa = (u64)chunk->dmainfo.dmaaddrs[i];
mem.size = 4096;
root->idx = fpm_to_idx(pble_rsrc, fpm_addr);
root->cnt = total;
- addr = (u64 *)(uintptr_t)root->addr;
+ addr = root->addr;
for (i = 0; i < total; i++, leaf++) {
pblcnt = (lflast && ((i + 1) == total)) ?
lflast : PBLE_PER_PAGE;
struct irdma_pble_alloc *palloc)
{
enum irdma_status_code ret_code;
- u64 fpm_addr, vaddr;
+ u64 fpm_addr;
struct irdma_pble_info *lvl1 = &palloc->level1;
ret_code = irdma_prm_get_pbles(&pble_rsrc->pinfo, &lvl1->chunkinfo,
- palloc->total_cnt << 3, &vaddr,
+ palloc->total_cnt << 3, &lvl1->addr,
&fpm_addr);
if (ret_code)
return IRDMA_ERR_NO_MEMORY;
- lvl1->addr = vaddr;
palloc->level = PBLE_LEVEL_1;
lvl1->idx = fpm_to_idx(pble_rsrc, fpm_addr);
lvl1->cnt = palloc->total_cnt;
};
struct irdma_pble_info {
- u64 addr;
+ u64 *addr;
u32 idx;
u32 cnt;
struct irdma_pble_chunkinfo chunkinfo;
u32 sizeofbitmap;
u64 size;
- u64 vaddr;
+ void *vaddr;
u64 fpm_addr;
u32 pg_cnt;
enum irdma_alloc_type type;
enum irdma_status_code
irdma_prm_get_pbles(struct irdma_pble_prm *pprm,
struct irdma_pble_chunkinfo *chunkinfo, u32 mem_size,
- u64 *vaddr, u64 *fpm_addr);
+ u64 **vaddr, u64 *fpm_addr);
void irdma_prm_return_pbles(struct irdma_pble_prm *pprm,
struct irdma_pble_chunkinfo *chunkinfo);
void irdma_pble_acquire_lock(struct irdma_hmc_pble_rsrc *pble_rsrc,
enum irdma_status_code
irdma_prm_get_pbles(struct irdma_pble_prm *pprm,
struct irdma_pble_chunkinfo *chunkinfo, u32 mem_size,
- u64 *vaddr, u64 *fpm_addr)
+ u64 **vaddr, u64 *fpm_addr)
{
u64 bits_needed;
u64 bit_idx = PBLE_INVALID_IDX;
struct list_head *chunk_entry = pprm->clist.next;
u32 offset;
unsigned long flags;
- *vaddr = 0;
+ *vaddr = NULL;
*fpm_addr = 0;
bits_needed = (mem_size + (1 << pprm->pble_shift) - 1) >> pprm->pble_shift;
done:
kfree(chunk->dmainfo.dmaaddrs);
chunk->dmainfo.dmaaddrs = NULL;
- vfree((void *)(uintptr_t)chunk->vaddr);
- chunk->vaddr = 0;
+ vfree(chunk->vaddr);
+ chunk->vaddr = NULL;
chunk->type = 0;
}
vfree(va);
goto err;
}
- chunk->vaddr = (uintptr_t)va;
+ chunk->vaddr = va;
chunk->size = size;
chunk->pg_cnt = pg_cnt;
chunk->type = PBLE_SD_PAGED;
*idx = 0;
(*pinfo)++;
- return (u64 *)(uintptr_t)(*pinfo)->addr;
+ return (*pinfo)->addr;
}
/**
bool ret;
if (palloc->level == PBLE_LEVEL_1) {
- arr = (u64 *)(uintptr_t)palloc->level1.addr;
+ arr = palloc->level1.addr;
ret = irdma_check_mem_contiguous(arr, palloc->total_cnt,
pg_size);
return ret;
}
- start_addr = (u64 *)(uintptr_t)leaf->addr;
+ start_addr = leaf->addr;
for (i = 0; i < lvl2->leaf_cnt; i++, leaf++) {
- arr = (u64 *)(uintptr_t)leaf->addr;
+ arr = leaf->addr;
if ((*start_addr + (i * pg_size * PBLE_PER_PAGE)) != *arr)
return false;
ret = irdma_check_mem_contiguous(arr, leaf->cnt, pg_size);
level = palloc->level;
pinfo = (level == PBLE_LEVEL_1) ? &palloc->level1 :
palloc->level2.leaf;
- pbl = (u64 *)(uintptr_t)pinfo->addr;
+ pbl = pinfo->addr;
} else {
pbl = iwmr->pgaddrmem;
}
}
if (use_pbles)
- arr = (u64 *)(uintptr_t)palloc->level1.addr;
+ arr = palloc->level1.addr;
switch (iwmr->type) {
case IRDMA_MEMREG_TYPE_QP:
if (unlikely(iwmr->npages == iwmr->page_cnt))
return -ENOMEM;
- pbl = (u64 *)(uintptr_t)palloc->level1.addr;
+ pbl = palloc->level1.addr;
pbl[iwmr->npages++] = addr;
return 0;
stag_info.addr_type = IRDMA_ADDR_TYPE_VA_BASED;
stag_info.va = (void *)(uintptr_t)iwmr->ibmr.iova;
stag_info.total_len = iwmr->ibmr.length;
- stag_info.reg_addr_pa = *((u64 *)(uintptr_t)palloc->level1.addr);
+ stag_info.reg_addr_pa = *palloc->level1.addr;
stag_info.first_pm_pbl_index = palloc->level1.idx;
stag_info.local_fence = ib_wr->send_flags & IB_SEND_FENCE;
if (iwmr->npages > IRDMA_MIN_PAGES_PER_FMR)
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