}
break;
case RTCCON:
+ ptimer_transaction_begin(s->ptimer_1Hz);
if (value & RTC_ENABLE) {
exynos4210_rtc_update_freq(s, value);
}
ptimer_stop(s->ptimer);
}
}
+ ptimer_transaction_commit(s->ptimer_1Hz);
s->reg_rtccon = value;
break;
case TICCNT:
exynos4210_rtc_update_freq(s, s->reg_rtccon);
ptimer_stop(s->ptimer);
+ ptimer_transaction_begin(s->ptimer_1Hz);
ptimer_stop(s->ptimer_1Hz);
+ ptimer_transaction_commit(s->ptimer_1Hz);
}
static const MemoryRegionOps exynos4210_rtc_ops = {
ptimer_set_freq(s->ptimer, RTC_BASE_FREQ);
exynos4210_rtc_update_freq(s, 0);
- bh = qemu_bh_new(exynos4210_rtc_1Hz_tick, s);
- s->ptimer_1Hz = ptimer_init_with_bh(bh, PTIMER_POLICY_DEFAULT);
+ s->ptimer_1Hz = ptimer_init(exynos4210_rtc_1Hz_tick,
+ s, PTIMER_POLICY_DEFAULT);
+ ptimer_transaction_begin(s->ptimer_1Hz);
ptimer_set_freq(s->ptimer_1Hz, RTC_BASE_FREQ);
+ ptimer_transaction_commit(s->ptimer_1Hz);
sysbus_init_irq(dev, &s->alm_irq);
sysbus_init_irq(dev, &s->tick_irq);