mark_page_dirty_in_slot(vcpu->kvm, ghc->memslot, gpa_to_gfn(ghc->gpa));
 }
 
+static bool kvm_is_msr_to_save(u32 msr_index)
+{
+       unsigned int i;
+
+       for (i = 0; i < num_msrs_to_save; i++) {
+               if (msrs_to_save[i] == msr_index)
+                       return true;
+       }
+
+       return false;
+}
+
 int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
 {
        u32 msr = msr_info->index;
                vcpu->arch.guest_fpu.xfd_err = data;
                break;
 #endif
-       case MSR_IA32_PEBS_ENABLE:
-       case MSR_IA32_DS_AREA:
-       case MSR_PEBS_DATA_CFG:
-       case MSR_F15H_PERF_CTL0 ... MSR_F15H_PERF_CTR5:
+       default:
                if (kvm_pmu_is_valid_msr(vcpu, msr))
                        return kvm_pmu_set_msr(vcpu, msr_info);
+
                /*
                 * Userspace is allowed to write '0' to MSRs that KVM reports
                 * as to-be-saved, even if an MSRs isn't fully supported.
                 */
-               return !msr_info->host_initiated || data;
-       default:
-               if (kvm_pmu_is_valid_msr(vcpu, msr))
-                       return kvm_pmu_set_msr(vcpu, msr_info);
+               if (msr_info->host_initiated && !data &&
+                   kvm_is_msr_to_save(msr))
+                       break;
+
                return KVM_MSR_RET_INVALID;
        }
        return 0;
        case MSR_DRAM_ENERGY_STATUS:    /* DRAM controller */
                msr_info->data = 0;
                break;
-       case MSR_IA32_PEBS_ENABLE:
-       case MSR_IA32_DS_AREA:
-       case MSR_PEBS_DATA_CFG:
-       case MSR_F15H_PERF_CTL0 ... MSR_F15H_PERF_CTR5:
-               if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
-                       return kvm_pmu_get_msr(vcpu, msr_info);
-               /*
-                * Userspace is allowed to read MSRs that KVM reports as
-                * to-be-saved, even if an MSR isn't fully supported.
-                */
-               if (!msr_info->host_initiated)
-                       return 1;
-               msr_info->data = 0;
-               break;
        case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
        case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:
        case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:
        default:
                if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
                        return kvm_pmu_get_msr(vcpu, msr_info);
+
+               /*
+                * Userspace is allowed to read MSRs that KVM reports as
+                * to-be-saved, even if an MSR isn't fully supported.
+                */
+               if (msr_info->host_initiated &&
+                   kvm_is_msr_to_save(msr_info->index)) {
+                       msr_info->data = 0;
+                       break;
+               }
+
                return KVM_MSR_RET_INVALID;
        }
        return 0;