pinctrl: renesas: rzg2l: Improve rzg2l_gpio_register()

Update rzg2l_gpio_register() to use driver data for chip->names
and check for gpio-range. This allows reusing the driver for
SoC's with different port pin definitions(eg:- RZ/G2UL SoC has
fewer ports compared to RZ/G2L and port pin definitions are
different).

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Link: https://lore.kernel.org/r/20220206194614.13209-2-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

diff --git a/drivers/pinctrl/renesas/pinctrl-rzg2l.c b/drivers/pinctrl/renesas/pinctrl-rzg2l.c
index ccee9c9e2e223e430e57c8884e5a56a8c0a760b7..cb805502fb0f5ea7722a9f3b4eb299fa638419bd 100644 (file)
--- a/drivers/pinctrl/renesas/pinctrl-rzg2l.c
+++ b/drivers/pinctrl/renesas/pinctrl-rzg2l.c
@@ -1090,12 +1090,12 @@ static int rzg2l_gpio_register(struct rzg2l_pinctrl *pctrl)
        }
 
        if (of_args.args[0] != 0 || of_args.args[1] != 0 ||
-           of_args.args[2] != ARRAY_SIZE(rzg2l_gpio_names)) {
+           of_args.args[2] != pctrl->data->n_port_pins) {
                dev_err(pctrl->dev, "gpio-ranges does not match selected SOC\n");
                return -EINVAL;
        }
 
-       chip->names = rzg2l_gpio_names;
+       chip->names = pctrl->data->port_pins;
        chip->request = rzg2l_gpio_request;
        chip->free = rzg2l_gpio_free;
        chip->get_direction = rzg2l_gpio_get_direction;