arm64: dts: qcom: ipq6018: Add QUP5 SPI node

Add node to support the QUP5 SPI controller inside of IPQ6018.
Some routers use this bus to connect SPI TPM chips.

Signed-off-by: Chukun Pan <amadeus@jmu.edu.cn>
Link: https://lore.kernel.org/r/20231203154003.532765-1-amadeus@jmu.edu.cn
Signed-off-by: Bjorn Andersson <andersson@kernel.org>

diff --git a/arch/arm64/boot/dts/qcom/ipq6018.dtsi b/arch/arm64/boot/dts/qcom/ipq6018.dtsi
index f7359de98d7029dd0ab42cd67242b47bfd995ff5..4fa1b4b649d589349920ea5b320e6c4d8d7c26f8 100644 (file)
--- a/arch/arm64/boot/dts/qcom/ipq6018.dtsi
+++ b/arch/arm64/boot/dts/qcom/ipq6018.dtsi
@@ -534,6 +534,20 @@
                        status = "disabled";
                };
 
+               blsp1_spi5: spi@78b9000 {
+                       compatible = "qcom,spi-qup-v2.2.1";
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       reg = <0x0 0x078b9000 0x0 0x600>;
+                       interrupts = <GIC_SPI 299 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&gcc GCC_BLSP1_QUP5_SPI_APPS_CLK>,
+                                <&gcc GCC_BLSP1_AHB_CLK>;
+                       clock-names = "core", "iface";
+                       dmas = <&blsp_dma 20>, <&blsp_dma 21>;
+                       dma-names = "tx", "rx";
+                       status = "disabled";
+               };
+
                blsp1_i2c2: i2c@78b6000 {
                        compatible = "qcom,i2c-qup-v2.2.1";
                        #address-cells = <1>;