static void tegra186_gpio_init_route_mapping(struct tegra_gpio *gpio)
 {
        struct device *dev = gpio->gpio.parent;
-       unsigned int i, j;
+       unsigned int i;
        u32 value;
 
        for (i = 0; i < gpio->soc->num_ports; i++) {
                         * On Tegra194 and later, each pin can be routed to one or more
                         * interrupts.
                         */
-                       for (j = 0; j < gpio->num_irqs_per_bank; j++) {
-                               dev_dbg(dev, "programming default interrupt routing for port %s\n",
-                                       port->name);
-
-                               offset = TEGRA186_GPIO_INT_ROUTE_MAPPING(p, j);
-
-                               /*
-                                * By default we only want to route GPIO pins to IRQ 0. This works
-                                * only under the assumption that we're running as the host kernel
-                                * and hence all GPIO pins are owned by Linux.
-                                *
-                                * For cases where Linux is the guest OS, the hypervisor will have
-                                * to configure the interrupt routing and pass only the valid
-                                * interrupts via device tree.
-                                */
-                               if (j == 0) {
-                                       value = readl(base + offset);
-                                       value = BIT(port->pins) - 1;
-                                       writel(value, base + offset);
-                               }
-                       }
+                       dev_dbg(dev, "programming default interrupt routing for port %s\n",
+                               port->name);
+
+                       offset = TEGRA186_GPIO_INT_ROUTE_MAPPING(p, 0);
+
+                       /*
+                        * By default we only want to route GPIO pins to IRQ 0. This works
+                        * only under the assumption that we're running as the host kernel
+                        * and hence all GPIO pins are owned by Linux.
+                        *
+                        * For cases where Linux is the guest OS, the hypervisor will have
+                        * to configure the interrupt routing and pass only the valid
+                        * interrupts via device tree.
+                        */
+                       value = readl(base + offset);
+                       value = BIT(port->pins) - 1;
+                       writel(value, base + offset);
                }
        }
 }