arm64: dts: mediatek: adjust whitespace around '='
authorKrzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Thu, 26 May 2022 20:44:01 +0000 (22:44 +0200)
committerMatthias Brugger <matthias.bgg@gmail.com>
Fri, 17 Jun 2022 09:04:12 +0000 (11:04 +0200)
Fix whitespace coding style: use single space instead of tabs or
multiple spaces around '=' sign in property assignment.  No functional
changes (same DTB).

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20220526204402.832393-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
arch/arm64/boot/dts/mediatek/mt2712-evb.dts
arch/arm64/boot/dts/mediatek/mt7622-bananapi-bpi-r64.dts
arch/arm64/boot/dts/mediatek/mt7622-rfb1.dts
arch/arm64/boot/dts/mediatek/mt7622.dtsi
arch/arm64/boot/dts/mediatek/mt7986a.dtsi
arch/arm64/boot/dts/mediatek/mt8173-elm.dtsi
arch/arm64/boot/dts/mediatek/mt8173-evb.dts
arch/arm64/boot/dts/mediatek/mt8173.dtsi
arch/arm64/boot/dts/mediatek/mt8183.dtsi
arch/arm64/boot/dts/mediatek/mt8195-evb.dts

index 11aa135aa0f3b69d685774d5f505aa87e592736b..9b1af9c8013085871a7f1530b7092f0aab287b7f 100644 (file)
 };
 
 &eth {
-       phy-mode ="rgmii-rxid";
+       phy-mode = "rgmii-rxid";
        phy-handle = <&ethernet_phy0>;
        mediatek,tx-delay-ps = <1530>;
        snps,reset-gpio = <&pio 87 GPIO_ACTIVE_LOW>;
index 2b9bf8dd14ecc08c0cd9b8f4a6e8e9ee210a9d79..ada06d3de1c9097d14133df66e69819b55e85bcb 100644 (file)
        i2c1_pins: i2c1-pins {
                mux {
                        function = "i2c";
-                       groups =  "i2c1_0";
+                       groups = "i2c1_0";
                };
        };
 
        i2c2_pins: i2c2-pins {
                mux {
                        function = "i2c";
-                       groups =  "i2c2_0";
+                       groups = "i2c2_0";
                };
        };
 
        irrx_pins: irrx-pins {
                mux {
                        function = "ir";
-                       groups =  "ir_1_rx";
+                       groups = "ir_1_rx";
                };
        };
 
        irtx_pins: irtx-pins {
                mux {
                        function = "ir";
-                       groups =  "ir_1_tx";
+                       groups = "ir_1_tx";
                };
        };
 
index 596c073d8b05da25825c3cffbe140c1180ee1691..3ee392d805d8bc1ee8a145eac1a4c67fcbeca804 100644 (file)
        i2c1_pins: i2c1-pins {
                mux {
                        function = "i2c";
-                       groups =  "i2c1_0";
+                       groups = "i2c1_0";
                };
        };
 
        i2c2_pins: i2c2-pins {
                mux {
                        function = "i2c";
-                       groups =  "i2c2_0";
+                       groups = "i2c2_0";
                };
        };
 
        irrx_pins: irrx-pins {
                mux {
                        function = "ir";
-                       groups =  "ir_1_rx";
+                       groups = "ir_1_rx";
                };
        };
 
        irtx_pins: irtx-pins {
                mux {
                        function = "ir";
-                       groups =  "ir_1_tx";
+                       groups = "ir_1_tx";
                };
        };
 
index dbcee8b4d8d8f8f9a2f7b5453b3774568a9a0643..146e18b5b1f46a7f72e5adcb9ea040a34a6a0efb 100644 (file)
        };
 
        psci {
-               compatible  = "arm,psci-0.2";
-               method      = "smc";
+               compatible = "arm,psci-0.2";
+               method = "smc";
        };
 
        pmu {
 
                afe: audio-controller {
                        compatible = "mediatek,mt7622-audio";
-                       interrupts =  <GIC_SPI 144 IRQ_TYPE_LEVEL_LOW>,
-                                     <GIC_SPI 145 IRQ_TYPE_LEVEL_LOW>;
-                       interrupt-names = "afe", "asys";
+                       interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_LOW>,
+                                    <GIC_SPI 145 IRQ_TYPE_LEVEL_LOW>;
+                       interrupt-names = "afe", "asys";
 
                        clocks = <&infracfg CLK_INFRA_AUDIO_PD>,
                                 <&topckgen CLK_TOP_AUD1_SEL>,
index d2636a0ed152e6620e35dceee3e31a94ee84b452..e3a407d03551fec7c66243ce8f1439d54b514806 100644 (file)
@@ -57,8 +57,8 @@
        };
 
        psci {
-               compatible  = "arm,psci-0.2";
-               method      = "smc";
+               compatible = "arm,psci-0.2";
+               method = "smc";
        };
 
        reserved-memory {
index 9c75fbb31f98593f8950ac710a0958122f9735b7..0d8f9459e35ded64ed9f9c2f9fadac2a08997830 100644 (file)
                                regulator-name = "VBUCKA";
                                regulator-min-microvolt = < 700000>;
                                regulator-max-microvolt = <1310000>;
-                               regulator-min-microamp  = <2000000>;
-                               regulator-max-microamp  = <4400000>;
+                               regulator-min-microamp = <2000000>;
+                               regulator-max-microamp = <4400000>;
                                regulator-ramp-delay = <10000>;
                                regulator-always-on;
                                regulator-allowed-modes = <DA9211_BUCK_MODE_SYNC
                                regulator-name = "VBUCKB";
                                regulator-min-microvolt = < 700000>;
                                regulator-max-microvolt = <1310000>;
-                               regulator-min-microamp  = <2000000>;
-                               regulator-max-microamp  = <3000000>;
+                               regulator-min-microamp = <2000000>;
+                               regulator-max-microamp = <3000000>;
                                regulator-ramp-delay = <10000>;
                        };
                };
        mmc-hs400-1_8v;
        cap-mmc-hw-reset;
        hs400-ds-delay = <0x14015>;
-       mediatek,hs200-cmd-int-delay=<30>;
-       mediatek,hs400-cmd-int-delay=<14>;
+       mediatek,hs200-cmd-int-delay = <30>;
+       mediatek,hs400-cmd-int-delay = <14>;
        mediatek,hs400-cmd-resp-sel-rising;
        vmmc-supply = <&mt6397_vemc_3v3_reg>;
        vqmmc-supply = <&mt6397_vio18_reg>;
index 4fa1e93302c7514c1a0dc8eeaed72f6f784f6f20..0b5f154007be8ffa6ed19849d156bdac62dd5a2f 100644 (file)
                                regulator-name = "VBUCKA";
                                regulator-min-microvolt = < 700000>;
                                regulator-max-microvolt = <1310000>;
-                               regulator-min-microamp  = <2000000>;
-                               regulator-max-microamp  = <4400000>;
+                               regulator-min-microamp = <2000000>;
+                               regulator-max-microamp = <4400000>;
                                regulator-ramp-delay = <10000>;
                                regulator-always-on;
                        };
                                regulator-name = "VBUCKB";
                                regulator-min-microvolt = < 700000>;
                                regulator-max-microvolt = <1310000>;
-                               regulator-min-microamp  = <2000000>;
-                               regulator-max-microamp  = <3000000>;
+                               regulator-min-microamp = <2000000>;
+                               regulator-max-microamp = <3000000>;
                                regulator-ramp-delay = <10000>;
                        };
                };
        bus-width = <8>;
        max-frequency = <50000000>;
        cap-mmc-highspeed;
-       mediatek,hs200-cmd-int-delay=<26>;
-       mediatek,hs400-cmd-int-delay=<14>;
+       mediatek,hs200-cmd-int-delay = <26>;
+       mediatek,hs400-cmd-int-delay = <14>;
        mediatek,hs400-cmd-resp-sel-rising;
        vmmc-supply = <&mt6397_vemc_3v3_reg>;
        vqmmc-supply = <&mt6397_vio18_reg>;
index 40d7b47fc52e8a83a9ecac0c9e4287e1f44dd2f8..5e903ab5884c31d060058fc76c8a97cb4cd14e0b 100644 (file)
        psci {
                compatible = "arm,psci-1.0", "arm,psci-0.2", "arm,psci";
                method = "smc";
-               cpu_suspend   = <0x84000001>;
-               cpu_off       = <0x84000002>;
-               cpu_on        = <0x84000003>;
+               cpu_suspend = <0x84000001>;
+               cpu_off  = <0x84000002>;
+               cpu_on   = <0x84000003>;
        };
 
        clk26m: oscillator0 {
 
                vcodec_enc_vp8: vcodec@19002000 {
                        compatible = "mediatek,mt8173-vcodec-enc-vp8";
-                       reg =  <0 0x19002000 0 0x1000>; /* VENC_LT_SYS */
+                       reg = <0 0x19002000 0 0x1000>; /* VENC_LT_SYS */
                        interrupts = <GIC_SPI 202 IRQ_TYPE_LEVEL_LOW>;
                        iommus = <&iommu M4U_PORT_VENC_RCPU_SET2>,
                                 <&iommu M4U_PORT_VENC_REC_FRM_SET2>,
index 2fde0ddd98c1126e266d5151e6e8342780b0033e..475ec6cfd293790f437e52b7971b9f840ff437f5 100644 (file)
        };
 
        psci {
-               compatible      = "arm,psci-1.0";
-               method          = "smc";
+               compatible = "arm,psci-1.0";
+               method = "smc";
        };
 
        clk26m: oscillator {
 
                                power-domain@MT8183_POWER_DOMAIN_MFG_ASYNC {
                                        reg = <MT8183_POWER_DOMAIN_MFG_ASYNC>;
-                                       clocks =  <&topckgen CLK_TOP_MUX_MFG>;
+                                       clocks = <&topckgen CLK_TOP_MUX_MFG>;
                                        clock-names = "mfg";
                                        #address-cells = <1>;
                                        #size-cells = <0>;
                };
 
                ssusb: usb@11201000 {
-                       compatible ="mediatek,mt8183-mtu3", "mediatek,mtu3";
+                       compatible = "mediatek,mt8183-mtu3", "mediatek,mtu3";
                        reg = <0 0x11201000 0 0x2e00>,
                              <0 0x11203e00 0 0x0100>;
                        reg-names = "mac", "ippc";
index db25a515e42022a2e45687fa2f70588d36017864..690dc7717f2c9d087af9c20931e18c2feeddfcd1 100644 (file)
 };
 
 &u3phy0 {
-       status="okay";
+       status = "okay";
 };
 
 &u3phy1 {
-       status="okay";
+       status = "okay";
 };
 
 &u3phy2 {
-       status="okay";
+       status = "okay";
 };
 
 &u3phy3 {
-       status="okay";
+       status = "okay";
 };
 
 &uart0 {