x86/mm: Switch to new Intel CPU model defines

New CPU #defines encode vendor and family as well as model.

[ dhansen: vertically align 0's in invlpg_miss_ids[] ]

Signed-off-by: Tony Luck <tony.luck@intel.com>
Signed-off-by: Dave Hansen <dave.hansen@linux.intel.com>
Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de>
Link: https://lore.kernel.org/all/20240424181518.41946-1-tony.luck%40intel.com

diff --git a/arch/x86/mm/init.c b/arch/x86/mm/init.c
index 679893ea5e68733bb512bdc39229f704bffea379..6b43b64803549f9d768a393eba8a88fb681cd9bf 100644 (file)
--- a/arch/x86/mm/init.c
+++ b/arch/x86/mm/init.c
@@ -261,21 +261,17 @@ static void __init probe_page_size_mask(void)
        }
 }
 
-#define INTEL_MATCH(_model) { .vendor  = X86_VENDOR_INTEL,     \
-                             .family  = 6,                     \
-                             .model = _model,                  \
-                           }
 /*
  * INVLPG may not properly flush Global entries
  * on these CPUs when PCIDs are enabled.
  */
 static const struct x86_cpu_id invlpg_miss_ids[] = {
-       INTEL_MATCH(INTEL_FAM6_ALDERLAKE   ),
-       INTEL_MATCH(INTEL_FAM6_ALDERLAKE_L ),
-       INTEL_MATCH(INTEL_FAM6_ATOM_GRACEMONT ),
-       INTEL_MATCH(INTEL_FAM6_RAPTORLAKE  ),
-       INTEL_MATCH(INTEL_FAM6_RAPTORLAKE_P),
-       INTEL_MATCH(INTEL_FAM6_RAPTORLAKE_S),
+       X86_MATCH_VFM(INTEL_ALDERLAKE,      0),
+       X86_MATCH_VFM(INTEL_ALDERLAKE_L,    0),
+       X86_MATCH_VFM(INTEL_ATOM_GRACEMONT, 0),
+       X86_MATCH_VFM(INTEL_RAPTORLAKE,     0),
+       X86_MATCH_VFM(INTEL_RAPTORLAKE_P,   0),
+       X86_MATCH_VFM(INTEL_RAPTORLAKE_S,   0),
        {}
 };