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target-arm: Implement AArch64 view of ACTLR
author
Peter Maydell
<peter.maydell@linaro.org>
Tue, 15 Apr 2014 18:18:45 +0000
(19:18 +0100)
committer
Peter Maydell
<peter.maydell@linaro.org>
Thu, 17 Apr 2014 20:34:05 +0000
(21:34 +0100)
Implement the AArch64 view of the ACTLR (auxiliary control
register). Note that QEMU internally tends to call this
AUXCR for historical reasons.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
target-arm/helper.c
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diff --git
a/target-arm/helper.c
b/target-arm/helper.c
index 10300aa331c7f30529432bcc5f66991449ef6203..32af1df530dfa0c02cd842ebaab68db3884b4b5c 100644
(file)
--- a/
target-arm/helper.c
+++ b/
target-arm/helper.c
@@
-2316,7
+2316,8
@@
void register_cp_regs_for_features(ARMCPU *cpu)
if (arm_feature(env, ARM_FEATURE_AUXCR)) {
ARMCPRegInfo auxcr = {
- .name = "AUXCR", .cp = 15, .crn = 1, .crm = 0, .opc1 = 0, .opc2 = 1,
+ .name = "ACTLR_EL1", .state = ARM_CP_STATE_BOTH,
+ .opc0 = 3, .opc1 = 0, .crn = 1, .crm = 0, .opc2 = 1,
.access = PL1_RW, .type = ARM_CP_CONST,
.resetvalue = cpu->reset_auxcr
};