drm/i915/adl_p: Pipe B DMC Support
authorAnusha Srivatsa <anusha.srivatsa@intel.com>
Mon, 21 Jun 2021 19:14:14 +0000 (12:14 -0700)
committerAnusha Srivatsa <anusha.srivatsa@intel.com>
Mon, 21 Jun 2021 23:15:29 +0000 (16:15 -0700)
ADLP requires us to load both Pipe A and Pipe B.
Plug Pipe B loading support.

Cc: Lucas De Marchi <lucas.demarchi@intel.com>
Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210621191415.29823-4-anusha.srivatsa@intel.com
drivers/gpu/drm/i915/display/intel_display_debugfs.c
drivers/gpu/drm/i915/display/intel_dmc.h

index 2a1c39a0e56e0a0946a84475cff0ca8bf9755b95..db38891a9ef0f8341fb0ab47990d513b28ab439d 100644 (file)
@@ -546,6 +546,8 @@ static int i915_dmc_info(struct seq_file *m, void *unused)
        seq_printf(m, "path: %s\n", dmc->fw_path);
        seq_printf(m, "Pipe A fw support: %s\n", yesno(INTEL_GEN(dev_priv) >= 12));
        seq_printf(m, "Pipe A fw loaded: %s\n", yesno(dmc->dmc_info[DMC_FW_PIPEA].payload));
+       seq_printf(m, "Pipe B fw support: %s\n", yesno(IS_ALDERLAKE_P(dev_priv)));
+       seq_printf(m, "Pipe B fw loaded: %s\n", yesno(dmc->dmc_info[DMC_FW_PIPEB].payload));
 
        if (!intel_dmc_has_payload(dev_priv))
                goto out;
index 007a284b0ef043508db4435101fbf271574e7b54..c3c00ff03869b9316a811322751d9e04baeb4083 100644 (file)
@@ -19,6 +19,7 @@ struct drm_i915_private;
 enum {
        DMC_FW_MAIN = 0,
        DMC_FW_PIPEA,
+       DMC_FW_PIPEB,
        DMC_FW_MAX
 };