drm/amd/pm: correct the dpm features disablement for Navi1x

For BACO scenario, PMFW will handle the dpm features disablement
and interaction with RLC properly. Driver involvement is unnecessary
and error prone.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Lijo Lazar <lijo.lazar@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c b/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
index e6673753595c884608184997b70373df8a013d7d..a6029a88929bb878de5713bd5071345fce7f0a5f 100644 (file)
--- a/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
@@ -1387,7 +1387,8 @@ static int smu_disable_dpms(struct smu_context *smu)
         * For Sienna_Cichlid, PMFW will handle the features disablement properly
         * on BACO in. Driver involvement is unnecessary.
         */
-       if ((adev->asic_type == CHIP_SIENNA_CICHLID) &&
+       if (((adev->asic_type == CHIP_SIENNA_CICHLID) ||
+            ((adev->asic_type >= CHIP_NAVI10) && (adev->asic_type <= CHIP_NAVI12))) &&
             use_baco)
                return smu_disable_all_features_with_exception(smu,
                                                               true,