arm64: dts: ti: Add support for TI J722S Evaluation Module

Add basic support for the J722S EVM with UART console and
MMC SD as rootfs.

Schematics are available at:
	https://www.ti.com/lit/zip/sprr495

Co-developed-by: Jayesh Choudhary <j-choudhary@ti.com>
Signed-off-by: Jayesh Choudhary <j-choudhary@ti.com>
Signed-off-by: Vaishnav Achath <vaishnav.a@ti.com>
Reviewed-by: Manorit Chawdhry <m-chawdhry@ti.com>
Link: https://lore.kernel.org/r/20240206100608.127702-4-vaishnav.a@ti.com
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>

diff --git a/arch/arm64/boot/dts/ti/Makefile b/arch/arm64/boot/dts/ti/Makefile
index e67c19bb0c2f5f4c47705bf223736bc20b0b0856..e50f90b4d0a8af230777ee5513b400a84b08427b 100644 (file)
--- a/arch/arm64/boot/dts/ti/Makefile
+++ b/arch/arm64/boot/dts/ti/Makefile
@@ -85,6 +85,9 @@ k3-j721s2-evm-dtbs := k3-j721s2-common-proc-board.dtb k3-j721s2-evm-gesi-exp-boa
 dtb-$(CONFIG_ARCH_K3) += k3-j721s2-evm.dtb
 dtb-$(CONFIG_ARCH_K3) += k3-j721s2-evm-pcie1-ep.dtbo
 
+# Boards with J722s SoC
+dtb-$(CONFIG_ARCH_K3) += k3-j722s-evm.dtb
+
 # Boards with J784s4 SoC
 dtb-$(CONFIG_ARCH_K3) += k3-am69-sk.dtb
 dtb-$(CONFIG_ARCH_K3) += k3-j784s4-evm.dtb

diff --git a/arch/arm64/boot/dts/ti/k3-j722s-evm.dts b/arch/arm64/boot/dts/ti/k3-j722s-evm.dts
new file mode 100644 (file)
index 0000000..b4f2fee
--- /dev/null
+++ b/arch/arm64/boot/dts/ti/k3-j722s-evm.dts
@@ -0,0 +1,251 @@
+// SPDX-License-Identifier: GPL-2.0-only OR MIT
+/*
+ * Device Tree file for the J722S EVM
+ * Copyright (C) 2024 Texas Instruments Incorporated - https://www.ti.com/
+ *
+ * Schematics: https://www.ti.com/lit/zip/sprr495
+ */
+
+/dts-v1/;
+
+#include "k3-j722s.dtsi"
+
+/ {
+       compatible = "ti,j722s-evm", "ti,j722s";
+       model = "Texas Instruments J722S EVM";
+
+       aliases {
+               serial0 = &wkup_uart0;
+               serial2 = &main_uart0;
+               mmc0 = &sdhci0;
+               mmc1 = &sdhci1;
+       };
+
+       chosen {
+               stdout-path = &main_uart0;
+       };
+
+       memory@80000000 {
+               /* 8G RAM */
+               reg = <0x00000000 0x80000000 0x00000000 0x80000000>,
+                     <0x00000008 0x80000000 0x00000001 0x80000000>;
+               device_type = "memory";
+               bootph-pre-ram;
+       };
+
+       reserved_memory: reserved-memory {
+               #address-cells = <2>;
+               #size-cells = <2>;
+               ranges;
+
+               secure_tfa_ddr: tfa@9e780000 {
+                       reg = <0x00 0x9e780000 0x00 0x80000>;
+                       no-map;
+               };
+
+               secure_ddr: optee@9e800000 {
+                       reg = <0x00 0x9e800000 0x00 0x01800000>;
+                       no-map;
+               };
+
+               wkup_r5fss0_core0_memory_region: r5f-memory@a0100000 {
+                       compatible = "shared-dma-pool";
+                       reg = <0x00 0xa0100000 0x00 0xf00000>;
+                       no-map;
+               };
+
+       };
+
+       vmain_pd: regulator-0 {
+               /* TPS65988 PD CONTROLLER OUTPUT */
+               compatible = "regulator-fixed";
+               regulator-name = "vmain_pd";
+               regulator-min-microvolt = <5000000>;
+               regulator-max-microvolt = <5000000>;
+               regulator-always-on;
+               regulator-boot-on;
+               bootph-all;
+       };
+
+       vsys_5v0: regulator-vsys5v0 {
+               /* Output of LM5140 */
+               compatible = "regulator-fixed";
+               regulator-name = "vsys_5v0";
+               regulator-min-microvolt = <5000000>;
+               regulator-max-microvolt = <5000000>;
+               vin-supply = <&vmain_pd>;
+               regulator-always-on;
+               regulator-boot-on;
+       };
+
+       vdd_mmc1: regulator-mmc1 {
+               /* TPS22918DBVR */
+               compatible = "regulator-fixed";
+               regulator-name = "vdd_mmc1";
+               regulator-min-microvolt = <3300000>;
+               regulator-max-microvolt = <3300000>;
+               regulator-boot-on;
+               enable-active-high;
+               gpio = <&exp1 15 GPIO_ACTIVE_HIGH>;
+               bootph-all;
+       };
+
+       vdd_sd_dv: regulator-TLV71033 {
+               compatible = "regulator-gpio";
+               regulator-name = "tlv71033";
+               pinctrl-names = "default";
+               pinctrl-0 = <&vdd_sd_dv_pins_default>;
+               regulator-min-microvolt = <1800000>;
+               regulator-max-microvolt = <3300000>;
+               regulator-boot-on;
+               vin-supply = <&vsys_5v0>;
+               gpios = <&main_gpio0 70 GPIO_ACTIVE_HIGH>;
+               states = <1800000 0x0>,
+                        <3300000 0x1>;
+       };
+
+       vsys_io_1v8: regulator-vsys-io-1v8 {
+               compatible = "regulator-fixed";
+               regulator-name = "vsys_io_1v8";
+               regulator-min-microvolt = <1800000>;
+               regulator-max-microvolt = <1800000>;
+               regulator-always-on;
+               regulator-boot-on;
+       };
+
+       vsys_io_1v2: regulator-vsys-io-1v2 {
+               compatible = "regulator-fixed";
+               regulator-name = "vsys_io_1v2";
+               regulator-min-microvolt = <1200000>;
+               regulator-max-microvolt = <1200000>;
+               regulator-always-on;
+               regulator-boot-on;
+       };
+};
+
+&main_pmx0 {
+
+       main_i2c0_pins_default: main-i2c0-default-pins {
+               pinctrl-single,pins = <
+                       J722S_IOPAD(0x01e0, PIN_INPUT_PULLUP, 0) /* (D23) I2C0_SCL */
+                       J722S_IOPAD(0x01e4, PIN_INPUT_PULLUP, 0) /* (B22) I2C0_SDA */
+               >;
+               bootph-all;
+       };
+
+       main_uart0_pins_default: main-uart0-default-pins {
+               pinctrl-single,pins = <
+                       J722S_IOPAD(0x01c8, PIN_INPUT, 0)       /* (A22) UART0_RXD */
+                       J722S_IOPAD(0x01cc, PIN_OUTPUT, 0)      /* (B22) UART0_TXD */
+               >;
+               bootph-all;
+       };
+
+       vdd_sd_dv_pins_default: vdd-sd-dv-default-pins {
+               pinctrl-single,pins = <
+                       J722S_IOPAD(0x0120, PIN_INPUT, 7) /* (F27) MMC2_CMD.GPIO0_70 */
+               >;
+               bootph-all;
+       };
+
+       main_mmc1_pins_default: main-mmc1-default-pins {
+               pinctrl-single,pins = <
+                       J722S_IOPAD(0x023c, PIN_INPUT, 0) /* (H22) MMC1_CMD */
+                       J722S_IOPAD(0x0234, PIN_OUTPUT, 0) /* (H24) MMC1_CLK */
+                       J722S_IOPAD(0x0230, PIN_INPUT, 0) /* (H23) MMC1_DAT0 */
+                       J722S_IOPAD(0x022c, PIN_INPUT_PULLUP, 0) /* (H20) MMC1_DAT1 */
+                       J722S_IOPAD(0x0228, PIN_INPUT_PULLUP, 0) /* (J23) MMC1_DAT2 */
+                       J722S_IOPAD(0x0224, PIN_INPUT_PULLUP, 0) /* (H25) MMC1_DAT3 */
+                       J722S_IOPAD(0x0240, PIN_INPUT, 0) /* (B24) MMC1_SDCD */
+               >;
+               bootph-all;
+       };
+};
+
+&main_gpio1 {
+       status = "okay";
+};
+
+&main_uart0 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&main_uart0_pins_default>;
+       status = "okay";
+       bootph-all;
+};
+
+&mcu_pmx0 {
+
+       wkup_uart0_pins_default: wkup-uart0-default-pins {
+               pinctrl-single,pins = <
+                       J722S_MCU_IOPAD(0x02c, PIN_INPUT, 0)    /* (C7) WKUP_UART0_CTSn */
+                       J722S_MCU_IOPAD(0x030, PIN_OUTPUT, 0)   /* (C6) WKUP_UART0_RTSn */
+                       J722S_MCU_IOPAD(0x024, PIN_INPUT, 0)    /* (D8) WKUP_UART0_RXD */
+                       J722S_MCU_IOPAD(0x028, PIN_OUTPUT, 0)   /* (D7) WKUP_UART0_TXD */
+               >;
+               bootph-all;
+       };
+
+       wkup_i2c0_pins_default: wkup-i2c0-default-pins {
+               pinctrl-single,pins = <
+                       J722S_MCU_IOPAD(0x04c, PIN_INPUT_PULLUP, 0)     /* (C7) WKUP_I2C0_SCL */
+                       J722S_MCU_IOPAD(0x050, PIN_INPUT_PULLUP, 0)     /* (C6) WKUP_I2C1_SDA */
+               >;
+               bootph-all;
+       };
+};
+
+&wkup_uart0 {
+       /* WKUP UART0 is used by Device Manager firmware */
+       pinctrl-names = "default";
+       pinctrl-0 = <&wkup_uart0_pins_default>;
+       status = "reserved";
+       bootph-all;
+};
+
+&wkup_i2c0 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&wkup_i2c0_pins_default>;
+       clock-frequency = <400000>;
+       status = "okay";
+       bootph-all;
+};
+
+&main_i2c0 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&main_i2c0_pins_default>;
+       clock-frequency = <400000>;
+       status = "okay";
+       bootph-all;
+
+       exp1: gpio@23 {
+               compatible = "ti,tca6424";
+               reg = <0x23>;
+               gpio-controller;
+               #gpio-cells = <2>;
+               gpio-line-names = "TRC_MUX_SEL", "OSPI/ONAND_MUX_SEL",
+                                 "MCASP1_FET_SEL", "CTRL_PM_I2C_OE#",
+                                 "CSI_VIO_SEL", "USB2.0_MUX_SEL",
+                                 "CSI01_MUX_SEL_2", "CSI23_MUX_SEL_2",
+                                 "LMK1_OE1", "LMK1_OE0",
+                                 "LMK2_OE0", "LMK2_OE1",
+                                 "GPIO_RGMII1_RST#", "GPIO_AUD_RSTn",
+                                 "GPIO_eMMC_RSTn", "GPIO_uSD_PWR_EN",
+                                 "USER_LED2", "MCAN0_STB",
+                                 "PCIe0_1L_RC_RSTz", "PCIe0_1L_PRSNT#",
+                                 "ENET1_EXP_SPARE2", "ENET1_EXP_PWRDN",
+                                 "PD_I2ENET1_I2CMUX_SELC_IRQ", "ENET1_EXP_RESETZ";
+       };
+};
+
+&sdhci1 {
+       /* SD/MMC */
+       vmmc-supply = <&vdd_mmc1>;
+       vqmmc-supply = <&vdd_sd_dv>;
+       pinctrl-names = "default";
+       pinctrl-0 = <&main_mmc1_pins_default>;
+       ti,driver-strength-ohm = <50>;
+       disable-wp;
+       no-1-8-v;
+       status = "okay";
+       bootph-all;
+};