arm64: dts: ti: k3-am642-evm/sk: Add support for main domain mcan nodes in EVM and...
authorAswath Govindraju <a-govindraju@ti.com>
Mon, 22 Nov 2021 13:41:58 +0000 (19:11 +0530)
committerVignesh Raghavendra <vigneshr@ti.com>
Tue, 7 Dec 2021 14:03:09 +0000 (19:33 +0530)
AM642 EVM has two CAN connecters brought out from the two MCAN instances in
the main domain through transceivers. Add device tree nodes for
transceivers and set the required properties in the mcan device tree nodes,
in EVM device tree file.

On AM642 SK there are no connectors brought out for CAN. Therefore, disable
the mcan device tree nodes in the SK device tree file.

Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Reviewed-by: Apurva Nandan <a-nandan@ti.com>
Link: https://lore.kernel.org/r/20211122134159.29936-7-a-govindraju@ti.com
arch/arm64/boot/dts/ti/k3-am642-evm.dts
arch/arm64/boot/dts/ti/k3-am642-sk.dts

index 6726c4c7c28c9b1b946187cf685f2d0ccc25c585..e94ae178b1ae34498f2cdbe7c7116927894d7482 100644 (file)
                        };
                };
        };
+
+       transceiver1: can-phy0 {
+               compatible = "ti,tcan1042";
+               #phy-cells = <0>;
+               max-bitrate = <5000000>;
+               standby-gpios = <&exp1 8 GPIO_ACTIVE_HIGH>;
+       };
+
+       transceiver2: can-phy1 {
+               compatible = "ti,tcan1042";
+               #phy-cells = <0>;
+               max-bitrate = <5000000>;
+               standby-gpios = <&exp1 9 GPIO_ACTIVE_HIGH>;
+       };
 };
 
 &main_pmx0 {
                        AM64X_IOPAD(0x0270, PIN_INPUT, 0) /* (D18) ECAP0_IN_APWM_OUT */
                >;
        };
+
+       main_mcan0_pins_default: main-mcan0-pins-default {
+               pinctrl-single,pins = <
+                       AM64X_IOPAD(0x0254, PIN_INPUT, 0) /* (B17) MCAN0_RX */
+                       AM64X_IOPAD(0x0250, PIN_OUTPUT, 0) /* (A17) MCAN0_TX */
+               >;
+       };
+
+       main_mcan1_pins_default: main-mcan1-pins-default {
+               pinctrl-single,pins = <
+                       AM64X_IOPAD(0x025c, PIN_INPUT, 0) /* (D17) MCAN1_RX */
+                       AM64X_IOPAD(0x0258, PIN_OUTPUT, 0) /* (C17) MCAN1_TX */
+               >;
+       };
 };
 
 &main_uart0 {
 &icssg1_mdio {
        status = "disabled";
 };
+
+&main_mcan0 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&main_mcan0_pins_default>;
+       phys = <&transceiver1>;
+};
+
+&main_mcan1 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&main_mcan1_pins_default>;
+       phys = <&transceiver2>;
+};
index 6b04745147be4b07368b0f9f094f8b90b04a617b..a9785bec12dfad5f2a918d578cf58052143736dc 100644 (file)
 &icssg1_mdio {
        status = "disabled";
 };
+
+&main_mcan0 {
+       status = "disabled";
+};
+
+&main_mcan1 {
+       status = "disabled";
+};