ARM: dts: Group omap3 CM_CLKSEL_WKUP clocks

The clksel related registers on omap3 cause unique_unit_address and
node_name_chars_strict warnings with the W=1 or W=2 make flags enabled.

With the clock drivers updated, we can now avoid most of these warnings
by grouping the TI component clocks using the TI clksel binding, and
with the use of clock-output-names property to avoid non-standard node
names for the clocks.

Signed-off-by: Tony Lindgren <tony@atomide.com>

diff --git a/arch/arm/boot/dts/omap36xx-omap3430es2plus-clocks.dtsi b/arch/arm/boot/dts/omap36xx-omap3430es2plus-clocks.dtsi
index b177eebcbae66886fc5e6b57de615ce5144078fb..c94eb86d3da75663751f54598896d199c3d8aba6 100644 (file)
--- a/arch/arm/boot/dts/omap36xx-omap3430es2plus-clocks.dtsi
+++ b/arch/arm/boot/dts/omap36xx-omap3430es2plus-clocks.dtsi
@@ -168,13 +168,20 @@
                clock-div = <20>;
        };
 
-       usim_mux_fck: usim_mux_fck@c40 {
-               #clock-cells = <0>;
-               compatible = "ti,composite-mux-clock";
-               clocks = <&sys_ck>, <&sys_d2_ck>, <&omap_96m_d2_fck>, <&omap_96m_d4_fck>, <&omap_96m_d8_fck>, <&omap_96m_d10_fck>, <&dpll5_m2_d4_ck>, <&dpll5_m2_d8_ck>, <&dpll5_m2_d16_ck>, <&dpll5_m2_d20_ck>;
-               ti,bit-shift = <3>;
-               reg = <0x0c40>;
-               ti,index-starts-at-one;
+       clock@c40 {
+               compatible = "ti,clksel";
+               reg = <0xc40>;
+               #clock-cells = <2>;
+               #address-cells = <0>;
+
+               usim_mux_fck: clock-usim-mux-fck {
+                       #clock-cells = <0>;
+                       compatible = "ti,composite-mux-clock";
+                       clock-output-names = "usim_mux_fck";
+                       clocks = <&sys_ck>, <&sys_d2_ck>, <&omap_96m_d2_fck>, <&omap_96m_d4_fck>, <&omap_96m_d8_fck>, <&omap_96m_d10_fck>, <&dpll5_m2_d4_ck>, <&dpll5_m2_d8_ck>, <&dpll5_m2_d16_ck>, <&dpll5_m2_d20_ck>;
+                       ti,bit-shift = <3>;
+                       ti,index-starts-at-one;
+               };
        };
 
        usim_fck: usim_fck {

diff --git a/arch/arm/boot/dts/omap3xxx-clocks.dtsi b/arch/arm/boot/dts/omap3xxx-clocks.dtsi
index 5d8fff6d37fb242577c4fe3310ce344739f663a8..80e63f185427e3c50164427238f740a4bc365b29 100644 (file)
--- a/arch/arm/boot/dts/omap3xxx-clocks.dtsi
+++ b/arch/arm/boot/dts/omap3xxx-clocks.dtsi
@@ -617,14 +617,29 @@
                };
        };
 
-       rm_ick: rm_ick@c40 {
-               #clock-cells = <0>;
-               compatible = "ti,divider-clock";
-               clocks = <&l4_ick>;
-               ti,bit-shift = <1>;
-               ti,max-div = <3>;
-               reg = <0x0c40>;
-               ti,index-starts-at-one;
+       /* CM_CLKSEL_WKUP */
+       clock@c40 {
+               compatible = "ti,clksel";
+               reg = <0xc40>;
+               #clock-cells = <2>;
+               #address-cells = <0>;
+
+               rm_ick: clock-rm-ick {
+                       #clock-cells = <0>;
+                       compatible = "ti,divider-clock";
+                       clock-output-names = "rm_ick";
+                       clocks = <&l4_ick>;
+                       ti,bit-shift = <1>;
+                       ti,max-div = <3>;
+                       ti,index-starts-at-one;
+               };
+
+               gpt1_mux_fck: clock-gpt1-mux-fck {
+                       #clock-cells = <0>;
+                       compatible = "ti,composite-mux-clock";
+                       clock-output-names = "gpt1_mux_fck";
+                       clocks = <&omap_32k_fck>, <&sys_ck>;
+               };
        };
 
        /* CM_FCLKEN1_CORE */
@@ -1053,13 +1068,6 @@
                };
        };
 
-       gpt1_mux_fck: gpt1_mux_fck@c40 {
-               #clock-cells = <0>;
-               compatible = "ti,composite-mux-clock";
-               clocks = <&omap_32k_fck>, <&sys_ck>;
-               reg = <0x0c40>;
-       };
-
        gpt1_fck: gpt1_fck {
                #clock-cells = <0>;
                compatible = "ti,composite-clock";