arm64: dts: socfpga: change address-cells to support 64-bit addressing

Update the address-cells and size-cells to 2 in order to support 64-bit
addressing.

Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>

diff --git a/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi b/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi
index b488e8d185f3c60e4ad5ceccaf3bb62106e9dc44..41c9eb51d0ee19111624f9e80b3944991ef8a6c8 100644 (file)
--- a/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi
+++ b/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi
@@ -134,9 +134,8 @@
                ranges = <0 0 0 0xffffffff>;
 
                base_fpga_region {
-                       #address-cells = <0x1>;
-                       #size-cells = <0x1>;
-
+                       #address-cells = <0x2>;
+                       #size-cells = <0x2>;
                        compatible = "fpga-region";
                        fpga-mgr = <&fpga_mgr>;
                };

diff --git a/arch/arm64/boot/dts/intel/socfpga_agilex.dtsi b/arch/arm64/boot/dts/intel/socfpga_agilex.dtsi
index f22302a19796593790884ac503175468a1ab34f8..f9674cc46764f46389392e2bd45d68e2905202e6 100644 (file)
--- a/arch/arm64/boot/dts/intel/socfpga_agilex.dtsi
+++ b/arch/arm64/boot/dts/intel/socfpga_agilex.dtsi
@@ -139,8 +139,8 @@
                ranges = <0 0 0 0xffffffff>;
 
                base_fpga_region {
-                       #address-cells = <0x1>;
-                       #size-cells = <0x1>;
+                       #address-cells = <0x2>;
+                       #size-cells = <0x2>;
                        compatible = "fpga-region";
                        fpga-mgr = <&fpga_mgr>;
                };