drm/i915: Set copy engine arbitration for Wa_16018031267 / Wa_16018063123

Set copy engine arbitration into round robin mode
for part of Wa_16018031267 / Wa_16018063123 mitigation.

Signed-off-by: Nirmoy Das <nirmoy.das@intel.com>
Signed-off-by: Jonathan Cavitt <jonathan.cavitt@intel.com>
Signed-off-by: Andrzej Hajda <andrzej.hajda@intel.com>
Reviewed-by: Andi Shyti <andi.shyti@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20231026-wabb-v6-4-4aa7d55d0a8a@intel.com

diff --git a/drivers/gpu/drm/i915/gt/intel_engine_regs.h b/drivers/gpu/drm/i915/gt/intel_engine_regs.h
index b8618ee3e3041ad694b4d983a9d6eff54df7f5f9..c0c8c12edea1046f088c35ce466a4e3bc6c0b161 100644 (file)
--- a/drivers/gpu/drm/i915/gt/intel_engine_regs.h
+++ b/drivers/gpu/drm/i915/gt/intel_engine_regs.h
@@ -124,6 +124,9 @@
 #define RING_INDIRECT_CTX(base)                        _MMIO((base) + 0x1c4) /* gen8+ */
 #define RING_INDIRECT_CTX_OFFSET(base)         _MMIO((base) + 0x1c8) /* gen8+ */
 #define ECOSKPD(base)                          _MMIO((base) + 0x1d0)
+#define   XEHP_BLITTER_SCHEDULING_MODE_MASK    REG_GENMASK(12, 11)
+#define   XEHP_BLITTER_ROUND_ROBIN_MODE                \
+               REG_FIELD_PREP(XEHP_BLITTER_SCHEDULING_MODE_MASK, 1)
 #define   ECO_CONSTANT_BUFFER_SR_DISABLE       REG_BIT(4)
 #define   ECO_GATING_CX_ONLY                   REG_BIT(3)
 #define   GEN6_BLITTER_FBC_NOTIFY              REG_BIT(3)

diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.c b/drivers/gpu/drm/i915/gt/intel_workarounds.c
index 6ae7a4de83b063f36778981a9b53097ed22e6ee2..12859b8d2092a2f264851a32ceeec76c0d67608e 100644 (file)
--- a/drivers/gpu/drm/i915/gt/intel_workarounds.c
+++ b/drivers/gpu/drm/i915/gt/intel_workarounds.c
@@ -2785,6 +2785,11 @@ xcs_engine_wa_init(struct intel_engine_cs *engine, struct i915_wa_list *wal)
                         RING_SEMA_WAIT_POLL(engine->mmio_base),
                         1);
        }
+       /* Wa_16018031267, Wa_16018063123 */
+       if (NEEDS_FASTCOLOR_BLT_WABB(engine))
+               wa_masked_field_set(wal, ECOSKPD(engine->mmio_base),
+                                   XEHP_BLITTER_SCHEDULING_MODE_MASK,
+                                   XEHP_BLITTER_ROUND_ROBIN_MODE);
 }
 
 static void