pinctrl: renesas: rzg2l: Configure interrupt input mode

Configure GPIO interrupt as input mode. Also if the bootloader sets
gpio interrupt pin as function, override it as gpio.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20240206135115.151218-2-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

diff --git a/drivers/pinctrl/renesas/pinctrl-rzg2l.c b/drivers/pinctrl/renesas/pinctrl-rzg2l.c
index 818dccdd70da114f4773d8a0efc321ceea60c673..03725a3c67038e0b1b69c5dd8e80610b26a57d4a 100644 (file)
--- a/drivers/pinctrl/renesas/pinctrl-rzg2l.c
+++ b/drivers/pinctrl/renesas/pinctrl-rzg2l.c
@@ -1894,6 +1894,26 @@ static const struct irq_chip rzg2l_gpio_irqchip = {
        GPIOCHIP_IRQ_RESOURCE_HELPERS,
 };
 
+static int rzg2l_gpio_interrupt_input_mode(struct gpio_chip *chip, unsigned int offset)
+{
+       struct rzg2l_pinctrl *pctrl = gpiochip_get_data(chip);
+       const struct pinctrl_pin_desc *pin_desc = &pctrl->desc.pins[offset];
+       u64 *pin_data = pin_desc->drv_data;
+       u32 off = RZG2L_PIN_CFG_TO_PORT_OFFSET(*pin_data);
+       u8 bit = RZG2L_PIN_ID_TO_PIN(offset);
+       u8 reg8;
+       int ret;
+
+       reg8 = readb(pctrl->base + PMC(off));
+       if (reg8 & BIT(bit)) {
+               ret = rzg2l_gpio_request(chip, offset);
+               if (ret)
+                       return ret;
+       }
+
+       return rzg2l_gpio_direction_input(chip, offset);
+}
+
 static int rzg2l_gpio_child_to_parent_hwirq(struct gpio_chip *gc,
                                            unsigned int child,
                                            unsigned int child_type,
@@ -1903,16 +1923,24 @@ static int rzg2l_gpio_child_to_parent_hwirq(struct gpio_chip *gc,
        struct rzg2l_pinctrl *pctrl = gpiochip_get_data(gc);
        unsigned long flags;
        int gpioint, irq;
+       int ret;
 
        gpioint = rzg2l_gpio_get_gpioint(child, pctrl);
        if (gpioint < 0)
                return gpioint;
 
+       ret = rzg2l_gpio_interrupt_input_mode(gc, child);
+       if (ret)
+               return ret;
+
        spin_lock_irqsave(&pctrl->bitmap_lock, flags);
        irq = bitmap_find_free_region(pctrl->tint_slot, RZG2L_TINT_MAX_INTERRUPT, get_order(1));
        spin_unlock_irqrestore(&pctrl->bitmap_lock, flags);
-       if (irq < 0)
-               return -ENOSPC;
+       if (irq < 0) {
+               ret = -ENOSPC;
+               goto err;
+       }
+
        pctrl->hwirq[irq] = child;
        irq += RZG2L_TINT_IRQ_START_INDEX;
 
@@ -1920,6 +1948,10 @@ static int rzg2l_gpio_child_to_parent_hwirq(struct gpio_chip *gc,
        *parent_type = IRQ_TYPE_LEVEL_HIGH;
        *parent = RZG2L_PACK_HWIRQ(gpioint, irq);
        return 0;
+
+err:
+       rzg2l_gpio_free(gc, child);
+       return ret;
 }
 
 static int rzg2l_gpio_populate_parent_fwspec(struct gpio_chip *chip,
@@ -1952,6 +1984,7 @@ static void rzg2l_gpio_irq_domain_free(struct irq_domain *domain, unsigned int v
 
                for (i = 0; i < RZG2L_TINT_MAX_INTERRUPT; i++) {
                        if (pctrl->hwirq[i] == hwirq) {
+                               rzg2l_gpio_free(gc, hwirq);
                                spin_lock_irqsave(&pctrl->bitmap_lock, flags);
                                bitmap_release_region(pctrl->tint_slot, i, get_order(1));
                                spin_unlock_irqrestore(&pctrl->bitmap_lock, flags);