target/riscv: fix ACPI MCFG table
authorIlya Chugin <danger_mail@list.ru>
Mon, 19 Feb 2024 16:09:49 +0000 (01:09 +0900)
committerAlistair Francis <alistair.francis@wdc.com>
Fri, 8 Mar 2024 11:00:37 +0000 (21:00 +1000)
MCFG segments should point to PCI configuration range, not BAR MMIO.

Signed-off-by: Ilya Chugin <danger_mail@list.ru>
Fixes: 55ecd83b36 ("hw/riscv/virt-acpi-build.c: Add IO controllers and devices")
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Sunil V L <sunilvl@ventanamicro.com>
Message-ID: <180d236d-c8e4-411a-b4d2-632eb82092fa@list.ru>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
hw/riscv/virt-acpi-build.c

index ef72db018ef9aa5b25d8e0b422afbc467b3077a3..0925528160f897a90af16bdea3e8608e3fdb769e 100644 (file)
@@ -647,8 +647,8 @@ static void virt_acpi_build(RISCVVirtState *s, AcpiBuildTables *tables)
     acpi_add_table(table_offsets, tables_blob);
     {
         AcpiMcfgInfo mcfg = {
-           .base = s->memmap[VIRT_PCIE_MMIO].base,
-           .size = s->memmap[VIRT_PCIE_MMIO].size,
+           .base = s->memmap[VIRT_PCIE_ECAM].base,
+           .size = s->memmap[VIRT_PCIE_ECAM].size,
         };
         build_mcfg(tables_blob, tables->linker, &mcfg, s->oem_id,
                    s->oem_table_id);