clk: stm32mp1: use stm32mp13 reset driver
authorGabriel Fernandez <gabriel.fernandez@foss.st.com>
Fri, 8 Dec 2023 14:36:57 +0000 (15:36 +0100)
committerStephen Boyd <sboyd@kernel.org>
Sun, 17 Dec 2023 23:33:26 +0000 (15:33 -0800)
STM32MP15 is now using the same reset driver as STM32MP13 as they
have the same binding requirement.

Signed-off-by: Gabriel Fernandez <gabriel.fernandez@foss.st.com>
Link: https://lore.kernel.org/r/20231208143700.354785-3-gabriel.fernandez@foss.st.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
drivers/clk/stm32/Makefile
drivers/clk/stm32/clk-stm32-core.c
drivers/clk/stm32/clk-stm32-core.h
drivers/clk/stm32/clk-stm32mp1.c
drivers/clk/stm32/clk-stm32mp13.c
drivers/clk/stm32/reset-stm32.c
drivers/clk/stm32/reset-stm32.h

index c154ef3e88f9dfb615d9ecbe6fa367da46dd2e23..5ced7fe3ddec664f673bba3ba8149a30cc4b03ae 100644 (file)
@@ -1,2 +1,2 @@
 obj-$(CONFIG_COMMON_CLK_STM32MP135)    += clk-stm32mp13.o clk-stm32-core.o reset-stm32.o
-obj-$(CONFIG_COMMON_CLK_STM32MP157)    += clk-stm32mp1.o
+obj-$(CONFIG_COMMON_CLK_STM32MP157)    += clk-stm32mp1.o reset-stm32.o
index 067b918a889456d04aa1a2ec0e4787d8f9645e26..58705fcad334d8f9cd5212327392209d66a0cdff 100644 (file)
@@ -70,6 +70,7 @@ static int stm32_rcc_clock_init(struct device *dev,
 int stm32_rcc_init(struct device *dev, const struct of_device_id *match_data,
                   void __iomem *base)
 {
+       const struct stm32_rcc_match_data *rcc_match_data;
        const struct of_device_id *match;
        int err;
 
@@ -79,8 +80,10 @@ int stm32_rcc_init(struct device *dev, const struct of_device_id *match_data,
                return -ENODEV;
        }
 
+       rcc_match_data = match->data;
+
        /* RCC Reset Configuration */
-       err = stm32_rcc_reset_init(dev, match, base);
+       err = stm32_rcc_reset_init(dev, rcc_match_data->reset_data, base);
        if (err) {
                pr_err("stm32 reset failed to initialize\n");
                return err;
index 76cffda0230848f4fbe4e9a5eab5e4c4782beffb..bb5aa19a792d1730da8e40b0200739a65ba4b3dc 100644 (file)
@@ -70,15 +70,12 @@ struct stm32_rcc_match_data {
        const struct clock_config       *tab_clocks;
        unsigned int                    maxbinding;
        struct clk_stm32_clock_data     *clock_data;
-       u32                             clear_offset;
+       struct clk_stm32_reset_data     *reset_data;
        int (*check_security)(void __iomem *base,
                              const struct clock_config *cfg);
        int (*multi_mux)(void __iomem *base, const struct clock_config *cfg);
 };
 
-int stm32_rcc_reset_init(struct device *dev, const struct of_device_id *match,
-                        void __iomem *base);
-
 int stm32_rcc_init(struct device *dev, const struct of_device_id *match_data,
                   void __iomem *base);
 
index 939779f66867e01af304e9a3c68aa459298ca565..7e2337297402a05f9aaaa86814246be530fd1fe7 100644 (file)
 
 #include <dt-bindings/clock/stm32mp1-clks.h>
 
+#include "reset-stm32.h"
+
+#define STM32MP1_RESET_ID_MASK GENMASK(15, 0)
+
 static DEFINE_SPINLOCK(rlock);
 
 #define RCC_OCENSETR           0x0C
@@ -2137,22 +2141,27 @@ struct stm32_rcc_match_data {
        const struct clock_config *cfg;
        unsigned int num;
        unsigned int maxbinding;
-       u32 clear_offset;
+       struct clk_stm32_reset_data *reset_data;
        bool (*check_security)(const struct clock_config *cfg);
 };
 
+static struct clk_stm32_reset_data stm32mp1_reset_data = {
+       .nr_lines       = STM32MP1_RESET_ID_MASK,
+       .clear_offset   = RCC_CLR,
+};
+
 static struct stm32_rcc_match_data stm32mp1_data = {
        .cfg            = stm32mp1_clock_cfg,
        .num            = ARRAY_SIZE(stm32mp1_clock_cfg),
        .maxbinding     = STM32MP1_LAST_CLK,
-       .clear_offset   = RCC_CLR,
+       .reset_data     = &stm32mp1_reset_data,
 };
 
 static struct stm32_rcc_match_data stm32mp1_data_secure = {
        .cfg            = stm32mp1_clock_cfg,
        .num            = ARRAY_SIZE(stm32mp1_clock_cfg),
        .maxbinding     = STM32MP1_LAST_CLK,
-       .clear_offset   = RCC_CLR,
+       .reset_data     = &stm32mp1_reset_data,
        .check_security = &stm32_check_security
 };
 
@@ -2193,113 +2202,6 @@ static int stm32_register_hw_clk(struct device *dev,
        return 0;
 }
 
-#define STM32_RESET_ID_MASK GENMASK(15, 0)
-
-struct stm32_reset_data {
-       /* reset lock */
-       spinlock_t                      lock;
-       struct reset_controller_dev     rcdev;
-       void __iomem                    *membase;
-       u32                             clear_offset;
-};
-
-static inline struct stm32_reset_data *
-to_stm32_reset_data(struct reset_controller_dev *rcdev)
-{
-       return container_of(rcdev, struct stm32_reset_data, rcdev);
-}
-
-static int stm32_reset_update(struct reset_controller_dev *rcdev,
-                             unsigned long id, bool assert)
-{
-       struct stm32_reset_data *data = to_stm32_reset_data(rcdev);
-       int reg_width = sizeof(u32);
-       int bank = id / (reg_width * BITS_PER_BYTE);
-       int offset = id % (reg_width * BITS_PER_BYTE);
-
-       if (data->clear_offset) {
-               void __iomem *addr;
-
-               addr = data->membase + (bank * reg_width);
-               if (!assert)
-                       addr += data->clear_offset;
-
-               writel(BIT(offset), addr);
-
-       } else {
-               unsigned long flags;
-               u32 reg;
-
-               spin_lock_irqsave(&data->lock, flags);
-
-               reg = readl(data->membase + (bank * reg_width));
-
-               if (assert)
-                       reg |= BIT(offset);
-               else
-                       reg &= ~BIT(offset);
-
-               writel(reg, data->membase + (bank * reg_width));
-
-               spin_unlock_irqrestore(&data->lock, flags);
-       }
-
-       return 0;
-}
-
-static int stm32_reset_assert(struct reset_controller_dev *rcdev,
-                             unsigned long id)
-{
-       return stm32_reset_update(rcdev, id, true);
-}
-
-static int stm32_reset_deassert(struct reset_controller_dev *rcdev,
-                               unsigned long id)
-{
-       return stm32_reset_update(rcdev, id, false);
-}
-
-static int stm32_reset_status(struct reset_controller_dev *rcdev,
-                             unsigned long id)
-{
-       struct stm32_reset_data *data = to_stm32_reset_data(rcdev);
-       int reg_width = sizeof(u32);
-       int bank = id / (reg_width * BITS_PER_BYTE);
-       int offset = id % (reg_width * BITS_PER_BYTE);
-       u32 reg;
-
-       reg = readl(data->membase + (bank * reg_width));
-
-       return !!(reg & BIT(offset));
-}
-
-static const struct reset_control_ops stm32_reset_ops = {
-       .assert         = stm32_reset_assert,
-       .deassert       = stm32_reset_deassert,
-       .status         = stm32_reset_status,
-};
-
-static int stm32_rcc_reset_init(struct device *dev, void __iomem *base,
-                               const struct of_device_id *match)
-{
-       const struct stm32_rcc_match_data *data = match->data;
-       struct stm32_reset_data *reset_data = NULL;
-
-       reset_data = kzalloc(sizeof(*reset_data), GFP_KERNEL);
-       if (!reset_data)
-               return -ENOMEM;
-
-       spin_lock_init(&reset_data->lock);
-       reset_data->membase = base;
-       reset_data->rcdev.owner = THIS_MODULE;
-       reset_data->rcdev.ops = &stm32_reset_ops;
-       reset_data->rcdev.of_node = dev_of_node(dev);
-       reset_data->rcdev.nr_resets = STM32_RESET_ID_MASK;
-       reset_data->clear_offset = data->clear_offset;
-
-       return reset_controller_register(&reset_data->rcdev);
-}
-
 static int stm32_rcc_clock_init(struct device *dev, void __iomem *base,
                                const struct of_device_id *match)
 {
@@ -2342,6 +2244,7 @@ static int stm32_rcc_clock_init(struct device *dev, void __iomem *base,
 static int stm32_rcc_init(struct device *dev, void __iomem *base,
                          const struct of_device_id *match_data)
 {
+       const struct stm32_rcc_match_data *rcc_match_data;
        const struct of_device_id *match;
        int err;
 
@@ -2351,8 +2254,10 @@ static int stm32_rcc_init(struct device *dev, void __iomem *base,
                return -ENODEV;
        }
 
+       rcc_match_data = match->data;
+
        /* RCC Reset Configuration */
-       err = stm32_rcc_reset_init(dev, base, match);
+       err = stm32_rcc_reset_init(dev, rcc_match_data->reset_data, base);
        if (err) {
                pr_err("stm32mp1 reset failed to initialize\n");
                return err;
index c4a737482fe5f153a0206a1b6d549108b65512c3..d4ecb3c34a1b26ab186abcdaec3dc8a9c5c1fe4e 100644 (file)
 #include <linux/platform_device.h>
 #include <dt-bindings/clock/stm32mp13-clks.h>
 #include "clk-stm32-core.h"
+#include "reset-stm32.h"
 #include "stm32mp13_rcc.h"
 
+#define STM32MP1_RESET_ID_MASK GENMASK(15, 0)
 #define RCC_CLR_OFFSET         0x4
 
 /* STM32 Gates definition */
@@ -1511,13 +1513,18 @@ static struct clk_stm32_clock_data stm32mp13_clock_data = {
        .is_multi_mux   = stm32mp13_is_multi_mux,
 };
 
+static struct clk_stm32_reset_data stm32mp13_reset_data = {
+       .nr_lines       = STM32MP1_RESET_ID_MASK,
+       .clear_offset   = RCC_CLR_OFFSET,
+};
+
 static const struct stm32_rcc_match_data stm32mp13_data = {
        .tab_clocks     = stm32mp13_clock_cfg,
        .num_clocks     = ARRAY_SIZE(stm32mp13_clock_cfg),
        .clock_data     = &stm32mp13_clock_data,
        .check_security = &stm32mp13_clock_is_provided_by_secure,
        .maxbinding     = STM32MP1_LAST_CLK,
-       .clear_offset   = RCC_CLR_OFFSET,
+       .reset_data     = &stm32mp13_reset_data,
 };
 
 static const struct of_device_id stm32mp13_match_data[] = {
index e89381528af99179887b2e662155697e1c283a66..14c2ee1eebee0d242b33a0cff5029123a3d3e609 100644 (file)
@@ -11,9 +11,7 @@
 #include <linux/slab.h>
 #include <linux/spinlock.h>
 
-#include "clk-stm32-core.h"
-
-#define STM32_RESET_ID_MASK GENMASK(15, 0)
+#include "reset-stm32.h"
 
 struct stm32_reset_data {
        /* reset lock */
@@ -99,24 +97,22 @@ static const struct reset_control_ops stm32_reset_ops = {
        .status         = stm32_reset_status,
 };
 
-int stm32_rcc_reset_init(struct device *dev, const struct of_device_id *match,
+int stm32_rcc_reset_init(struct device *dev, struct clk_stm32_reset_data *data,
                         void __iomem *base)
 {
-       const struct stm32_rcc_match_data *data = match->data;
-       struct stm32_reset_data *reset_data = NULL;
-
-       data = match->data;
+       struct stm32_reset_data *reset_data;
 
        reset_data = kzalloc(sizeof(*reset_data), GFP_KERNEL);
        if (!reset_data)
                return -ENOMEM;
 
        spin_lock_init(&reset_data->lock);
+
        reset_data->membase = base;
        reset_data->rcdev.owner = THIS_MODULE;
        reset_data->rcdev.ops = &stm32_reset_ops;
        reset_data->rcdev.of_node = dev_of_node(dev);
-       reset_data->rcdev.nr_resets = STM32_RESET_ID_MASK;
+       reset_data->rcdev.nr_resets = data->nr_lines;
        reset_data->clear_offset = data->clear_offset;
 
        return reset_controller_register(&reset_data->rcdev);
index 6eb6ea4b55ab953e300e8f149b43d3a0407d859c..8cf1cc9be480b21f9a2ec0ec4ac0ac6b7194baf5 100644 (file)
@@ -4,5 +4,11 @@
  * Author: Gabriel Fernandez <gabriel.fernandez@foss.st.com> for STMicroelectronics.
  */
 
-int stm32_rcc_reset_init(struct device *dev, const struct of_device_id *match,
+struct clk_stm32_reset_data {
+       const struct reset_control_ops *ops;
+       unsigned int nr_lines;
+       u32 clear_offset;
+};
+
+int stm32_rcc_reset_init(struct device *dev, struct clk_stm32_reset_data *data,
                         void __iomem *base);