drm/i915: Replace i915->gt0 with to_gt(i915)
authorAndi Shyti <andi.shyti@linux.intel.com>
Tue, 25 Jul 2023 10:33:30 +0000 (12:33 +0200)
committerAndi Shyti <andi.shyti@linux.intel.com>
Tue, 25 Jul 2023 16:18:29 +0000 (18:18 +0200)
Quite surprised to see that around i915 there are still i915->gt0
references. Replace them with the to_gt() helper.

Signed-off-by: Andi Shyti <andi.shyti@linux.intel.com>
Reviewed-by: Andrzej Hajda <andrzej.hajda@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20230725103330.1041394-1-andi.shyti@linux.intel.com
drivers/gpu/drm/i915/gem/i915_gem_stolen.c
drivers/gpu/drm/i915/gt/intel_gt.c
drivers/gpu/drm/i915/gt/intel_region_lmem.c
drivers/gpu/drm/i915/pxp/intel_pxp.c
drivers/gpu/drm/i915/selftests/mock_gem_device.c

index 3b094d36a0b04d21d6080bbb99d4f4218a6a30f5..5b0a5cf9a98a861561600ae5cbde32be2219a83d 100644 (file)
@@ -892,7 +892,7 @@ i915_gem_stolen_lmem_setup(struct drm_i915_private *i915, u16 type,
        } else {
                resource_size_t lmem_range;
 
-               lmem_range = intel_gt_mcr_read_any(&i915->gt0, XEHP_TILE0_ADDR_RANGE) & 0xFFFF;
+               lmem_range = intel_gt_mcr_read_any(to_gt(i915), XEHP_TILE0_ADDR_RANGE) & 0xFFFF;
                lmem_size = lmem_range >> XEHP_TILE_LMEM_RANGE_SHIFT;
                lmem_size *= SZ_1G;
        }
index c91d28236f0c117fd018509db25bb157c483d9b6..1cf325f402268b8b8d406be04b54be45b00c5ba0 100644 (file)
@@ -887,7 +887,7 @@ static int intel_gt_tile_setup(struct intel_gt *gt, phys_addr_t phys_addr)
 int intel_gt_probe_all(struct drm_i915_private *i915)
 {
        struct pci_dev *pdev = to_pci_dev(i915->drm.dev);
-       struct intel_gt *gt = &i915->gt0;
+       struct intel_gt *gt = to_gt(i915);
        const struct intel_gt_definition *gtdef;
        phys_addr_t phys_addr;
        unsigned int mmio_bar;
index 2a3217e2890fc7f2bfa7eb4ecd83e64f218a640d..f8512aee58a830fb9f723ae3c9e24c9888b04ffe 100644 (file)
@@ -220,7 +220,7 @@ static struct intel_memory_region *setup_lmem(struct intel_gt *gt)
                resource_size_t lmem_range;
                u64 tile_stolen, flat_ccs_base;
 
-               lmem_range = intel_gt_mcr_read_any(&i915->gt0, XEHP_TILE0_ADDR_RANGE) & 0xFFFF;
+               lmem_range = intel_gt_mcr_read_any(to_gt(i915), XEHP_TILE0_ADDR_RANGE) & 0xFFFF;
                lmem_size = lmem_range >> XEHP_TILE_LMEM_RANGE_SHIFT;
                lmem_size *= SZ_1G;
 
index bb2e15329f346c584b85f782584f67ad6ee73b15..38ec754d0ec8ee23ecd443419c4bb132821b0f0d 100644 (file)
@@ -162,8 +162,8 @@ static struct intel_gt *find_gt_for_required_teelink(struct drm_i915_private *i9
         * for HuC authentication. For now, its limited to DG2.
         */
        if (IS_ENABLED(CONFIG_INTEL_MEI_PXP) && IS_ENABLED(CONFIG_INTEL_MEI_GSC) &&
-           intel_huc_is_loaded_by_gsc(&i915->gt0.uc.huc) && intel_uc_uses_huc(&i915->gt0.uc))
-               return &i915->gt0;
+           intel_huc_is_loaded_by_gsc(&to_gt(i915)->uc.huc) && intel_uc_uses_huc(&to_gt(i915)->uc))
+               return to_gt(i915);
 
        return NULL;
 }
@@ -188,8 +188,8 @@ static struct intel_gt *find_gt_for_required_protected_content(struct drm_i915_p
         * Else we rely on mei-pxp module but only on legacy platforms
         * prior to having separate media GTs and has a valid VDBOX.
         */
-       if (IS_ENABLED(CONFIG_INTEL_MEI_PXP) && !i915->media_gt && VDBOX_MASK(&i915->gt0))
-               return &i915->gt0;
+       if (IS_ENABLED(CONFIG_INTEL_MEI_PXP) && !i915->media_gt && VDBOX_MASK(to_gt(i915)))
+               return to_gt(i915);
 
        return NULL;
 }
index 0eda8b4ee17f5bf14f0192bc1ad47670294ce615..4fad81f9f0eeb2c3c281c4a6e24dd7bc1764c440 100644 (file)
@@ -113,7 +113,7 @@ static struct dev_pm_domain pm_domain = {
 
 static void mock_gt_probe(struct drm_i915_private *i915)
 {
-       i915->gt[0] = &i915->gt0;
+       i915->gt[0] = to_gt(i915);
        i915->gt[0]->name = "Mock GT";
 }