ARM: dts: Configure omap5 rng to probe with ti-sysc

This is similar to dra7 and omap4 with different clock naming
and module address.

Cc: devicetree@vger.kernel.org
Cc: Rob Herring <robh+dt@kernel.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>

diff --git a/arch/arm/boot/dts/omap5-l4.dtsi b/arch/arm/boot/dts/omap5-l4.dtsi
index 25aacf1ba7084256dfea162f6beed43a9a0ce1bd..b931090ce9a6e14b605fd8479de5e1f3df7a60ea 100644 (file)
--- a/arch/arm/boot/dts/omap5-l4.dtsi
+++ b/arch/arm/boot/dts/omap5-l4.dtsi
@@ -1769,12 +1769,26 @@
                        };
                };
 
-               target-module@90000 {                   /* 0x48090000, ap 55 1a.0 */
-                       compatible = "ti,sysc";
-                       status = "disabled";
+               rng_target: target-module@90000 {       /* 0x48090000, ap 55 1a.0 */
+                       compatible = "ti,sysc-omap2", "ti,sysc";
+                       reg = <0x91fe0 0x4>,
+                             <0x91fe4 0x4>;
+                       reg-names = "rev", "sysc";
+                       ti,sysc-mask = <(SYSC_OMAP2_AUTOIDLE)>;
+                       ti,sysc-sidle = <SYSC_IDLE_FORCE>,
+                                       <SYSC_IDLE_NO>;
+                       /* Domains (P, C): l4per_pwrdm, l4sec_clkdm */
+                       clocks = <&l4sec_clkctrl OMAP5_RNG_CLKCTRL 0>;
+                       clock-names = "fck";
                        #address-cells = <1>;
                        #size-cells = <1>;
                        ranges = <0x0 0x90000 0x2000>;
+
+                       rng: rng@0 {
+                               compatible = "ti,omap4-rng";
+                               reg = <0x0 0x2000>;
+                               interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>;
+                       };
                };
 
                target-module@98000 {                   /* 0x48098000, ap 47 08.0 */