arm64: perf: Include threshold control fields in PMEVTYPER mask

FEAT_PMUv3_TH (Armv8.8) adds two new fields to PMEVTYPER, so include
them in the mask. These aren't writable on 32 bit kernels as they are in
the high part of the register, so only include them for arm64.

It would be difficult to do this statically in the asm header files for
each platform without resulting in circular includes or #ifdefs inline
in the code. For that reason the ARMV8_PMU_EVTYPE_MASK definition has
been removed and the mask is constructed programmatically.

Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Reviewed-by: Anshuman Khandual <anshuman.khandual@arm.com>
Signed-off-by: James Clark <james.clark@arm.com>
Link: https://lore.kernel.org/r/20231211161331.1277825-6-james.clark@arm.com
Signed-off-by: Will Deacon <will@kernel.org>

diff --git a/drivers/perf/arm_pmuv3.c b/drivers/perf/arm_pmuv3.c
index a93b4cf885624047544475f0adc96546a1a4984d..441bf73ee3d51bdb33bc5b2861457738d68ba707 100644 (file)
--- a/drivers/perf/arm_pmuv3.c
+++ b/drivers/perf/arm_pmuv3.c
@@ -558,8 +558,15 @@ static void armv8pmu_write_counter(struct perf_event *event, u64 value)
 static void armv8pmu_write_evtype(int idx, u32 val)
 {
        u32 counter = ARMV8_IDX_TO_COUNTER(idx);
+       unsigned long mask = ARMV8_PMU_EVTYPE_EVENT |
+                            ARMV8_PMU_INCLUDE_EL2 |
+                            ARMV8_PMU_EXCLUDE_EL0 |
+                            ARMV8_PMU_EXCLUDE_EL1;
 
-       val &= ARMV8_PMU_EVTYPE_MASK;
+       if (IS_ENABLED(CONFIG_ARM64))
+               mask |= ARMV8_PMU_EVTYPE_TC | ARMV8_PMU_EVTYPE_TH;
+
+       val &= mask;
        write_pmevtypern(counter, val);
 }
 

diff --git a/include/linux/perf/arm_pmuv3.h b/include/linux/perf/arm_pmuv3.h
index daa63542242dde9281247574db23c816e57ded4e..91957b3468e9a6654ab2cc2305d0f86a9bdc45fe 100644 (file)
--- a/include/linux/perf/arm_pmuv3.h
+++ b/include/linux/perf/arm_pmuv3.h
@@ -233,8 +233,9 @@
 /*
  * PMXEVTYPER: Event selection reg
  */
-#define ARMV8_PMU_EVTYPE_MASK  0xc800ffff      /* Mask for writable bits */
 #define ARMV8_PMU_EVTYPE_EVENT GENMASK(15, 0)  /* Mask for EVENT bits */
+#define ARMV8_PMU_EVTYPE_TH    GENMASK(43, 32)
+#define ARMV8_PMU_EVTYPE_TC    GENMASK(63, 61)
 
 /*
  * Event filters for PMUv3