bool is_32_bit, bool htif_custom_base)
{
void *fdt;
+ int fdt_size;
uint64_t addr, size;
unsigned long clint_addr;
int cpu, socket;
"sifive,clint0", "riscv,clint0"
};
- fdt = s->fdt = create_device_tree(&s->fdt_size);
+ fdt = mc->fdt = create_device_tree(&fdt_size);
if (!fdt) {
error_report("create_device_tree() failed");
exit(1);
hwaddr end = riscv_load_initrd(machine->initrd_filename,
machine->ram_size, kernel_entry,
&start);
- qemu_fdt_setprop_cell(s->fdt, "/chosen",
+ qemu_fdt_setprop_cell(machine->fdt, "/chosen",
"linux,initrd-start", start);
- qemu_fdt_setprop_cell(s->fdt, "/chosen", "linux,initrd-end",
+ qemu_fdt_setprop_cell(machine->fdt, "/chosen", "linux,initrd-end",
end);
}
/* Compute the fdt load address in dram */
fdt_load_addr = riscv_load_fdt(memmap[SPIKE_DRAM].base,
- machine->ram_size, s->fdt);
-
- /* Set machine->fdt for 'dumpdtb' QMP/HMP command */
- machine->fdt = s->fdt;
+ machine->ram_size, machine->fdt);
/* load the reset vector */
riscv_setup_rom_reset_vec(machine, &s->soc[0], memmap[SPIKE_DRAM].base,