#define GET_TX_RPT2_DESC_PKT_LEN_88E(__pRxStatusDesc) \
LE_BITS_TO_4BYTE(__pRxStatusDesc, 0, 9)
#define GET_TX_RPT2_DESC_MACID_VALID_1_88E(__pRxStatusDesc) \
- LE_BITS_TO_4BYTE(__pRxStatusDesc+16, 0, 32)
+ LE_BITS_TO_4BYTE(__pRxStatusDesc + 16, 0, 32)
#define GET_TX_RPT2_DESC_MACID_VALID_2_88E(__pRxStatusDesc) \
- LE_BITS_TO_4BYTE(__pRxStatusDesc+20, 0, 32)
+ LE_BITS_TO_4BYTE(__pRxStatusDesc + 20, 0, 32)
#define GET_TX_REPORT_TYPE1_RERTY_0(__pAddr) \
LE_BITS_TO_4BYTE(__pAddr, 0, 16)
};
#define SET_TX_DESC_ANTSEL_A_88E(__pTxDesc, __Value) \
- SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 24, 1, __Value)
+ SET_BITS_TO_LE_4BYTE(__pTxDesc + 8, 24, 1, __Value)
#define SET_TX_DESC_ANTSEL_B_88E(__pTxDesc, __Value) \
- SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 25, 1, __Value)
+ SET_BITS_TO_LE_4BYTE(__pTxDesc + 8, 25, 1, __Value)
#define SET_TX_DESC_ANTSEL_C_88E(__pTxDesc, __Value) \
- SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 29, 1, __Value)
+ SET_BITS_TO_LE_4BYTE(__pTxDesc + 28, 29, 1, __Value)
#endif /* __ODM_TYPES_H__ */
#define Rtl8188E_NIC_LPS_LEAVE_FLOW rtl8188E_leave_lps_flow
#define DRVINFO_SZ 4 /* unit is 8bytes */
-#define PageNum_128(_Len) (u32)(((_Len)>>7) + ((_Len) & 0x7F ? 1 : 0))
+#define PageNum_128(_Len) (u32)(((_Len) >> 7) + ((_Len) & 0x7F ? 1 : 0))
/* download firmware related data structure */
#define FW_8188E_SIZE 0x4000 /* 16384,16k */
#define MAX_PAGE_SIZE 4096 /* @ page : 4k bytes */
-#define IS_FW_HEADER_EXIST(_pFwHdr) \
- ((le16_to_cpu(_pFwHdr->signature)&0xFFF0) == 0x92C0 || \
- (le16_to_cpu(_pFwHdr->signature)&0xFFF0) == 0x88C0 || \
- (le16_to_cpu(_pFwHdr->signature)&0xFFF0) == 0x2300 || \
- (le16_to_cpu(_pFwHdr->signature)&0xFFF0) == 0x88E0)
+#define IS_FW_HEADER_EXIST(_pFwHdr) \
+ ((le16_to_cpu(_pFwHdr->signature) & 0xFFF0) == 0x92C0 || \
+ (le16_to_cpu(_pFwHdr->signature) & 0xFFF0) == 0x88C0 || \
+ (le16_to_cpu(_pFwHdr->signature) & 0xFFF0) == 0x2300 || \
+ (le16_to_cpu(_pFwHdr->signature) & 0xFFF0) == 0x88E0)
#define DRIVER_EARLY_INT_TIME 0x05
#define BCN_DMA_ATIME_INT_TIME 0x02
/* The following is for BT Efuse definition */
#define EFUSE_BT_MAX_MAP_LEN 1024
#define EFUSE_MAX_BANK 4
-#define EFUSE_MAX_BT_BANK (EFUSE_MAX_BANK-1)
+#define EFUSE_MAX_BT_BANK (EFUSE_MAX_BANK - 1)
/*--------------------------Define Parameters-------------------------------*/
#define EFUSE_MAX_WORD_UNIT 4
unsigned short rsvd;
};
-#define LPS_DELAY_TIME 1*HZ /* 1 sec */
+#define LPS_DELAY_TIME 1 * HZ /* 1 sec */
#define EXE_PWR_NONE 0x01
#define EXE_PWR_IPS 0x02
#define NR_RECVFRAME 256
#define RXFRAME_ALIGN 8
-#define RXFRAME_ALIGN_SZ (1<<RXFRAME_ALIGN)
+#define RXFRAME_ALIGN_SZ (1 << RXFRAME_ALIGN)
#define MAX_RXFRAME_CNT 512
#define MAX_RX_NUMBLKS (32)
dot11txpn._byte_.TSC5 = iv[7]; \
} while (0)
-#define ROL32(A, n) (((A) << (n)) | (((A)>>(32-(n))) & ((1UL << (n)) - 1)))
-#define ROR32(A, n) ROL32((A), 32-(n))
+#define ROL32(A, n) (((A) << (n)) | (((A) >> (32 - (n))) & ((1UL << (n)) - 1)))
+#define ROR32(A, n) ROL32((A), 32 - (n))
struct mic_data {
u32 K0, K1; /* Key */
/* Various logical functions */
#define RORc(x, y) \
- (((((unsigned long)(x) & 0xFFFFFFFFUL) >> (unsigned long)((y)&31)) | \
- ((unsigned long)(x) << (unsigned long)(32-((y)&31)))) & 0xFFFFFFFFUL)
+ (((((unsigned long)(x) & 0xFFFFFFFFUL) >> (unsigned long)((y) & 31)) | \
+ ((unsigned long)(x) << (unsigned long)(32 - ((y) & 31)))) & 0xFFFFFFFFUL)
#define Ch(x, y, z) (z ^ (x & (y ^ z)))
#define Maj(x, y, z) (((x | y) & z) | (x & y))
#define S(x, n) RORc((x), (n))
-#define R(x, n) (((x)&0xFFFFFFFFUL)>>(n))
+#define R(x, n) (((x) & 0xFFFFFFFFUL) >> (n))
#define Sigma0(x) (S(x, 2) ^ S(x, 13) ^ S(x, 22))
#define Sigma1(x) (S(x, 6) ^ S(x, 11) ^ S(x, 25))
#define Gamma0(x) (S(x, 7) ^ S(x, 18) ^ R(x, 3))
pattrib_iv[0] = dot11txpn._byte_.TSC0;\
pattrib_iv[1] = dot11txpn._byte_.TSC1;\
pattrib_iv[2] = dot11txpn._byte_.TSC2;\
- pattrib_iv[3] = ((keyidx & 0x3)<<6);\
- dot11txpn.val = (dot11txpn.val == 0xffffff) ? 0 : (dot11txpn.val+1);\
+ pattrib_iv[3] = ((keyidx & 0x3) << 6);\
+ dot11txpn.val = (dot11txpn.val == 0xffffff) ? 0 : (dot11txpn.val + 1);\
} while (0)
#define TKIP_IV(pattrib_iv, dot11txpn, keyidx)\
pattrib_iv[0] = dot11txpn._byte_.TSC1;\
pattrib_iv[1] = (dot11txpn._byte_.TSC1 | 0x20) & 0x7f;\
pattrib_iv[2] = dot11txpn._byte_.TSC0;\
- pattrib_iv[3] = BIT(5) | ((keyidx & 0x3)<<6);\
+ pattrib_iv[3] = BIT(5) | ((keyidx & 0x3) << 6);\
pattrib_iv[4] = dot11txpn._byte_.TSC2;\
pattrib_iv[5] = dot11txpn._byte_.TSC3;\
pattrib_iv[6] = dot11txpn._byte_.TSC4;\
pattrib_iv[7] = dot11txpn._byte_.TSC5;\
- dot11txpn.val = dot11txpn.val == 0xffffffffffffULL ? 0 : (dot11txpn.val+1);\
+ dot11txpn.val = dot11txpn.val == 0xffffffffffffULL ? 0 : (dot11txpn.val + 1);\
} while (0)
#define AES_IV(pattrib_iv, dot11txpn, keyidx)\
pattrib_iv[0] = dot11txpn._byte_.TSC0; \
pattrib_iv[1] = dot11txpn._byte_.TSC1; \
pattrib_iv[2] = 0; \
- pattrib_iv[3] = BIT(5) | ((keyidx & 0x3)<<6); \
+ pattrib_iv[3] = BIT(5) | ((keyidx & 0x3) << 6); \
pattrib_iv[4] = dot11txpn._byte_.TSC2; \
pattrib_iv[5] = dot11txpn._byte_.TSC3; \
pattrib_iv[6] = dot11txpn._byte_.TSC4; \
pattrib_iv[7] = dot11txpn._byte_.TSC5; \
- dot11txpn.val = dot11txpn.val == 0xffffffffffffULL ? 0 : (dot11txpn.val+1);\
+ dot11txpn.val = dot11txpn.val == 0xffffffffffffULL ? 0 : (dot11txpn.val + 1);\
} while (0)
#define HWXMIT_ENTRY 4
WIFI_MGT_TYPE = (0),
WIFI_CTRL_TYPE = (BIT(2)),
WIFI_DATA_TYPE = (BIT(3)),
- WIFI_QOS_DATA_TYPE = (BIT(7)|BIT(3)), /* QoS Data */
+ WIFI_QOS_DATA_TYPE = (BIT(7) | BIT(3)), /* QoS Data */
};
enum WIFI_FRAME_SUBTYPE {
#define MIC_CHECK_TIME 60000000
#ifndef Ndis802_11APMode
-#define Ndis802_11APMode (Ndis802_11InfrastructureMax+1)
+#define Ndis802_11APMode (Ndis802_11InfrastructureMax + 1)
#endif
struct wlan_phy_info {