arm64: dts: imx8mm-kontron: Fix reset delays for ethernet PHY

According to the datasheet the VSC8531 PHY expects a reset pulse of 100 ns
and a delay of 15 ms after the reset has been deasserted. Set the matching
values in the devicetree.

Reported-by: Heiko Thiery <heiko.thiery@gmail.com>
Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

diff --git a/arch/arm64/boot/dts/freescale/imx8mm-kontron-n801x-s.dts b/arch/arm64/boot/dts/freescale/imx8mm-kontron-n801x-s.dts
index d17abb51583511abe905359bef28318516e4c644..2f24f80afb2aea200f6e38d19797e5267c1f1187 100644 (file)
--- a/arch/arm64/boot/dts/freescale/imx8mm-kontron-n801x-s.dts
+++ b/arch/arm64/boot/dts/freescale/imx8mm-kontron-n801x-s.dts
@@ -121,8 +121,8 @@
 
                ethphy: ethernet-phy@0 {
                        reg = <0>;
-                       reset-assert-us = <100>;
-                       reset-deassert-us = <100>;
+                       reset-assert-us = <1>;
+                       reset-deassert-us = <15000>;
                        reset-gpios = <&gpio4 27 GPIO_ACTIVE_LOW>;
                };
        };