powerpc/32s: Fix LLVM SMP build

LLVM assembler does not recognise 3-operand cmpi, use cmpwi.

Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Link: https://msgid.link/20230606131828.315427-1-npiggin@gmail.com

diff --git a/arch/powerpc/mm/book3s32/hash_low.S b/arch/powerpc/mm/book3s32/hash_low.S
index 6925ce9985571e2fb9d138fe5a2e86ea48f26f07..a5a21d444e729db5f8a09f7437d710d25579f84b 100644 (file)
--- a/arch/powerpc/mm/book3s32/hash_low.S
+++ b/arch/powerpc/mm/book3s32/hash_low.S
@@ -199,12 +199,12 @@ _GLOBAL(add_hash_page)
        lis     r6, (mmu_hash_lock - PAGE_OFFSET)@ha
        addi    r6, r6, (mmu_hash_lock - PAGE_OFFSET)@l
 10:    lwarx   r0,0,r6                 /* take the mmu_hash_lock */
-       cmpi    0,r0,0
+       cmpwi   0,r0,0
        bne-    11f
        stwcx.  r8,0,r6
        beq+    12f
 11:    lwz     r0,0(r6)
-       cmpi    0,r0,0
+       cmpwi   0,r0,0
        beq     10b
        b       11b
 12:    isync
@@ -512,12 +512,12 @@ _GLOBAL(flush_hash_pages)
        lwz     r8, TASK_CPU(r8)
        oris    r8,r8,9
 10:    lwarx   r0,0,r9
-       cmpi    0,r0,0
+       cmpwi   0,r0,0
        bne-    11f
        stwcx.  r8,0,r9
        beq+    12f
 11:    lwz     r0,0(r9)
-       cmpi    0,r0,0
+       cmpwi   0,r0,0
        beq     10b
        b       11b
 12:    isync