drm/i915: Refactor confusing __intel_gt_reset()

__intel_gt_reset() is really for resetting engines though
the name might suggest something else. So add a helper function
to remove confusions with no functional changes.

v2: Move intel_gt_reset_all_engines() next to
    intel_gt_reset_engine() to make diff simple(John)

Cc: John Harrison <john.c.harrison@intel.com>
Signed-off-by: Nirmoy Das <nirmoy.das@intel.com>
Reviewed-by: John Harrison <John.C.Harrison@Intel.com>
Reviewed-by: Andi Shyti <andi.shyti@linux.intel.com>
Signed-off-by: Andi Shyti <andi.shyti@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240422201951.633-1-nirmoy.das@intel.com

diff --git a/drivers/gpu/drm/i915/gt/intel_engine_cs.c b/drivers/gpu/drm/i915/gt/intel_engine_cs.c
index 7e98940d89bdc9a936bfa5c9ed1a924f2a90d674..5ca5d065d671f5f3f87528b49b6abf6b72190f74 100644 (file)
--- a/drivers/gpu/drm/i915/gt/intel_engine_cs.c
+++ b/drivers/gpu/drm/i915/gt/intel_engine_cs.c
@@ -679,7 +679,7 @@ void intel_engines_release(struct intel_gt *gt)
         */
        GEM_BUG_ON(intel_gt_pm_is_awake(gt));
        if (!INTEL_INFO(gt->i915)->gpu_reset_clobbers_display)
-               __intel_gt_reset(gt, ALL_ENGINES);
+               intel_gt_reset_all_engines(gt);
 
        /* Decouple the backend; but keep the layout for late GPU resets */
        for_each_engine(engine, gt, id) {

diff --git a/drivers/gpu/drm/i915/gt/intel_execlists_submission.c b/drivers/gpu/drm/i915/gt/intel_execlists_submission.c
index b061a0a0d6b082021287bcd16a79bed6ed16eb27..9e9126077d3b1637c1e488fa36a4d848065191fc 100644 (file)
--- a/drivers/gpu/drm/i915/gt/intel_execlists_submission.c
+++ b/drivers/gpu/drm/i915/gt/intel_execlists_submission.c
@@ -2898,7 +2898,7 @@ static void enable_error_interrupt(struct intel_engine_cs *engine)
                drm_err(&engine->i915->drm,
                        "engine '%s' resumed still in error: %08x\n",
                        engine->name, status);
-               __intel_gt_reset(engine->gt, engine->mask);
+               intel_gt_reset_engine(engine);
        }
 
        /*

diff --git a/drivers/gpu/drm/i915/gt/intel_gt.c b/drivers/gpu/drm/i915/gt/intel_gt.c
index 6a2c2718bcc38e645903031ce00cd667c1ee5411..45920cda0cc779e2d96093d1ad9b9769c79df500 100644 (file)
--- a/drivers/gpu/drm/i915/gt/intel_gt.c
+++ b/drivers/gpu/drm/i915/gt/intel_gt.c
@@ -832,7 +832,7 @@ void intel_gt_driver_unregister(struct intel_gt *gt)
 
        /* Scrub all HW state upon release */
        with_intel_runtime_pm(gt->uncore->rpm, wakeref)
-               __intel_gt_reset(gt, ALL_ENGINES);
+               intel_gt_reset_all_engines(gt);
 }
 
 void intel_gt_driver_release(struct intel_gt *gt)

diff --git a/drivers/gpu/drm/i915/gt/intel_gt_pm.c b/drivers/gpu/drm/i915/gt/intel_gt_pm.c
index 220ac4f92edfc2dabd8267a1c8868878b1249fa0..c08fdb65cc6998688861b10ebd0b5463f9664c03 100644 (file)
--- a/drivers/gpu/drm/i915/gt/intel_gt_pm.c
+++ b/drivers/gpu/drm/i915/gt/intel_gt_pm.c
@@ -159,7 +159,7 @@ static bool reset_engines(struct intel_gt *gt)
        if (INTEL_INFO(gt->i915)->gpu_reset_clobbers_display)
                return false;
 
-       return __intel_gt_reset(gt, ALL_ENGINES) == 0;
+       return intel_gt_reset_all_engines(gt) == 0;
 }
 
 static void gt_sanitize(struct intel_gt *gt, bool force)

diff --git a/drivers/gpu/drm/i915/gt/intel_reset.c b/drivers/gpu/drm/i915/gt/intel_reset.c
index 6801f8b95c53d1ed989f6bb7c72205b2d7cd236a..6990cb5c89ae9129fad852ceae4abe9f53faef56 100644 (file)
--- a/drivers/gpu/drm/i915/gt/intel_reset.c
+++ b/drivers/gpu/drm/i915/gt/intel_reset.c
@@ -764,7 +764,7 @@ wa_14015076503_end(struct intel_gt *gt, intel_engine_mask_t engine_mask)
                         HECI_H_GS1_ER_PREP, 0);
 }
 
-int __intel_gt_reset(struct intel_gt *gt, intel_engine_mask_t engine_mask)
+static int __intel_gt_reset(struct intel_gt *gt, intel_engine_mask_t engine_mask)
 {
        const int retries = engine_mask == ALL_ENGINES ? RESET_MAX_RETRIES : 1;
        reset_func reset;
@@ -978,7 +978,7 @@ static void __intel_gt_set_wedged(struct intel_gt *gt)
 
        /* Even if the GPU reset fails, it should still stop the engines */
        if (!INTEL_INFO(gt->i915)->gpu_reset_clobbers_display)
-               __intel_gt_reset(gt, ALL_ENGINES);
+               intel_gt_reset_all_engines(gt);
 
        for_each_engine(engine, gt, id)
                engine->submit_request = nop_submit_request;
@@ -1088,7 +1088,7 @@ static bool __intel_gt_unset_wedged(struct intel_gt *gt)
        /* We must reset pending GPU events before restoring our submission */
        ok = !HAS_EXECLISTS(gt->i915); /* XXX better agnosticism desired */
        if (!INTEL_INFO(gt->i915)->gpu_reset_clobbers_display)
-               ok = __intel_gt_reset(gt, ALL_ENGINES) == 0;
+               ok = intel_gt_reset_all_engines(gt) == 0;
        if (!ok) {
                /*
                 * Warn CI about the unrecoverable wedged condition.
@@ -1132,10 +1132,10 @@ static int do_reset(struct intel_gt *gt, intel_engine_mask_t stalled_mask)
 {
        int err, i;
 
-       err = __intel_gt_reset(gt, ALL_ENGINES);
+       err = intel_gt_reset_all_engines(gt);
        for (i = 0; err && i < RESET_MAX_RETRIES; i++) {
                msleep(10 * (i + 1));
-               err = __intel_gt_reset(gt, ALL_ENGINES);
+               err = intel_gt_reset_all_engines(gt);
        }
        if (err)
                return err;
@@ -1269,7 +1269,30 @@ error:
        goto finish;
 }
 
-static int intel_gt_reset_engine(struct intel_engine_cs *engine)
+/**
+ * intel_gt_reset_all_engines() - Reset all engines in the given gt.
+ * @gt: the GT to reset all engines for.
+ *
+ * This function resets all engines within the given gt.
+ *
+ * Returns:
+ * Zero on success, negative error code on failure.
+ */
+int intel_gt_reset_all_engines(struct intel_gt *gt)
+{
+       return __intel_gt_reset(gt, ALL_ENGINES);
+}
+
+/**
+ * intel_gt_reset_engine() - Reset a specific engine within a gt.
+ * @engine: engine to be reset.
+ *
+ * This function resets the specified engine within a gt.
+ *
+ * Returns:
+ * Zero on success, negative error code on failure.
+ */
+int intel_gt_reset_engine(struct intel_engine_cs *engine)
 {
        return __intel_gt_reset(engine->gt, engine->mask);
 }

diff --git a/drivers/gpu/drm/i915/gt/intel_reset.h b/drivers/gpu/drm/i915/gt/intel_reset.h
index f615b30b81c59424cda4c98143703e9a3a5a769d..c00de353075c97dbc5754ee7b60cba1b6ae47366 100644 (file)
--- a/drivers/gpu/drm/i915/gt/intel_reset.h
+++ b/drivers/gpu/drm/i915/gt/intel_reset.h
@@ -54,7 +54,8 @@ int intel_gt_terminally_wedged(struct intel_gt *gt);
 void intel_gt_set_wedged_on_init(struct intel_gt *gt);
 void intel_gt_set_wedged_on_fini(struct intel_gt *gt);
 
-int __intel_gt_reset(struct intel_gt *gt, intel_engine_mask_t engine_mask);
+int intel_gt_reset_engine(struct intel_engine_cs *engine);
+int intel_gt_reset_all_engines(struct intel_gt *gt);
 
 int intel_reset_guc(struct intel_gt *gt);
 

diff --git a/drivers/gpu/drm/i915/gt/selftest_reset.c b/drivers/gpu/drm/i915/gt/selftest_reset.c
index f40de408cd3a98420db9e8102881d07c83a77568..2cfc23c58e9091a531558dad65913d0e14133124 100644 (file)
--- a/drivers/gpu/drm/i915/gt/selftest_reset.c
+++ b/drivers/gpu/drm/i915/gt/selftest_reset.c
@@ -281,7 +281,7 @@ static int igt_atomic_reset(void *arg)
                awake = reset_prepare(gt);
                p->critical_section_begin();
 
-               err = __intel_gt_reset(gt, ALL_ENGINES);
+               err = intel_gt_reset_all_engines(gt);
 
                p->critical_section_end();
                reset_finish(gt, awake);

diff --git a/drivers/gpu/drm/i915/i915_driver.c b/drivers/gpu/drm/i915/i915_driver.c
index 8a17eb7f93214b21d6ee5ee83494f13f4eb5e657..e11efcc642efd87a5dddf9c585a35875852ad1a1 100644 (file)
--- a/drivers/gpu/drm/i915/i915_driver.c
+++ b/drivers/gpu/drm/i915/i915_driver.c
@@ -202,7 +202,7 @@ static void sanitize_gpu(struct drm_i915_private *i915)
                unsigned int i;
 
                for_each_gt(gt, i915, i)
-                       __intel_gt_reset(gt, ALL_ENGINES);
+                       intel_gt_reset_all_engines(gt);
        }
 }