clk: qcom: gcc-sm8350: Set delay for Venus CLK resets

Some Venus resets may require more time when toggling. Describe that.

The value is known for SM8350, see [1].

[1] https://git.codelinaro.org/clo/la/platform/vendor/opensource/video-driver/-/commit/dfe241edf23daf3c1ccbb79b02798965123fad98

Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20240105-topic-venus_reset-v2-10-c37eba13b5ce@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>

diff --git a/drivers/clk/qcom/gcc-sm8350.c b/drivers/clk/qcom/gcc-sm8350.c
index 1385a98eb3bbebf08743a3eab92f2a762d35814b..df4842588a24817dd2a297c29fe25ad2aa36ed7e 100644 (file)
--- a/drivers/clk/qcom/gcc-sm8350.c
+++ b/drivers/clk/qcom/gcc-sm8350.c
@@ -3743,8 +3743,8 @@ static const struct qcom_reset_map gcc_sm8350_resets[] = {
        [GCC_USB3PHY_PHY_PRIM_BCR] = { 0x50004 },
        [GCC_USB3PHY_PHY_SEC_BCR] = { 0x50010 },
        [GCC_USB_PHY_CFG_AHB2PHY_BCR] = { 0x6a000 },
-       [GCC_VIDEO_AXI0_CLK_ARES] = { 0x28010, 2 },
-       [GCC_VIDEO_AXI1_CLK_ARES] = { 0x28018, 2 },
+       [GCC_VIDEO_AXI0_CLK_ARES] = { .reg = 0x28010, .bit = 2, .udelay = 400 },
+       [GCC_VIDEO_AXI1_CLK_ARES] = { .reg = 0x28018, .bit = 2, .udelay = 400 },
        [GCC_VIDEO_BCR] = { 0x28000 },
 };