ARM: dts: Group omap3 CM_FCLKEN_CAM clocks

The clksel related registers on omap3 cause unique_unit_address and
node_name_chars_strict warnings with the W=1 or W=2 make flags enabled.

With the clock drivers updated, we can now avoid most of these warnings
by grouping the TI component clocks using the TI clksel binding, and
with the use of clock-output-names property to avoid non-standard node
names for the clocks.

Signed-off-by: Tony Lindgren <tony@atomide.com>

diff --git a/arch/arm/boot/dts/omap34xx-omap36xx-clocks.dtsi b/arch/arm/boot/dts/omap34xx-omap36xx-clocks.dtsi
index edc28654d158aac8874cc90710a44d939a3f9edc..8374532f20e2b752dfee16ee9f1740619c92b6fe 100644 (file)
--- a/arch/arm/boot/dts/omap34xx-omap36xx-clocks.dtsi
+++ b/arch/arm/boot/dts/omap34xx-omap36xx-clocks.dtsi
@@ -60,13 +60,29 @@
                };
        };
 
-       cam_mclk: cam_mclk@f00 {
-               #clock-cells = <0>;
-               compatible = "ti,gate-clock";
-               clocks = <&dpll4_m5x2_ck>;
-               ti,bit-shift = <0>;
-               reg = <0x0f00>;
-               ti,set-rate-parent;
+       /* CM_FCLKEN_CAM */
+       clock@f00 {
+               compatible = "ti,clksel";
+               reg = <0xf00>;
+               #clock-cells = <2>;
+               #address-cells = <0>;
+
+               cam_mclk: clock-cam-mclk {
+                       #clock-cells = <0>;
+                       compatible = "ti,gate-clock";
+                       clock-output-names = "cam_mclk";
+                       clocks = <&dpll4_m5x2_ck>;
+                       ti,bit-shift = <0>;
+                       ti,set-rate-parent;
+               };
+
+               csi2_96m_fck: clock-csi2-96m-fck {
+                       #clock-cells = <0>;
+                       compatible = "ti,gate-clock";
+                       clock-output-names = "csi2_96m_fck";
+                       clocks = <&core_96m_fck>;
+                       ti,bit-shift = <1>;
+               };
        };
 
        cam_ick: cam_ick@f10 {
@@ -77,14 +93,6 @@
                ti,bit-shift = <0>;
        };
 
-       csi2_96m_fck: csi2_96m_fck@f00 {
-               #clock-cells = <0>;
-               compatible = "ti,gate-clock";
-               clocks = <&core_96m_fck>;
-               reg = <0x0f00>;
-               ti,bit-shift = <1>;
-       };
-
        security_l3_ick: security_l3_ick {
                #clock-cells = <0>;
                compatible = "fixed-factor-clock";