ASoC: amd: ps: add fix for dma irq mask for rx streams for SDW0 instance
authorVijendar Mukunda <Vijendar.Mukunda@amd.com>
Mon, 26 Jun 2023 10:53:50 +0000 (16:23 +0530)
committerMark Brown <broonie@kernel.org>
Mon, 26 Jun 2023 12:28:57 +0000 (13:28 +0100)
Correct the DMA irq mask macro to program DMA irq bits correctly for
SDW0 instance rx streams.

Fixes: 298d4f7b1765 ("ASoC: amd: ps: add support for SoundWire DMA interrupts")
Signed-off-by: Vijendar Mukunda <Vijendar.Mukunda@amd.com>
Link: https://lore.kernel.org/r/20230626105356.2580125-2-Vijendar.Mukunda@amd.com
Signed-off-by: Mark Brown <broonie@kernel.org>
sound/soc/amd/ps/acp63.h

index 733a16e23d3210c3788a16d7111f112a6b90d8ec..8b853b8d02199232fa1d3f979f35c675ae8765ae 100644 (file)
  * 5 (SDW0_AUDIO2_RX)  23
  */
 #define SDW0_DMA_TX_IRQ_MASK(i)        (ACP_AUDIO0_TX_THRESHOLD - (2 * (i)))
-#define SDW0_DMA_RX_IRQ_MASK(i)        (ACP_AUDIO0_RX_THRESHOLD - (2 * (i)))
+#define SDW0_DMA_RX_IRQ_MASK(i)        (ACP_AUDIO0_RX_THRESHOLD - (2 * ((i) - 3)))
 
 /*
  * Below entries describes SDW1 instance DMA stream id and DMA irq bit mapping