ARM: dts: qcom: sdx65: Add spmi node
authorRohit Agarwal <quic_rohiagar@quicinc.com>
Wed, 16 Mar 2022 06:17:22 +0000 (11:47 +0530)
committerBjorn Andersson <bjorn.andersson@linaro.org>
Wed, 13 Apr 2022 02:55:37 +0000 (21:55 -0500)
Add SPMI node to SDX65 dtsi.

Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/1647411447-25249-2-git-send-email-quic_rohiagar@quicinc.com
arch/arm/boot/dts/qcom-sdx65.dtsi

index 14579121be5a48a145bc42dcdb142ebae8e98918..ba7b6c5c1562a1e97d87dcba489b694c74136450 100644 (file)
                        status = "disabled";
                };
 
+               spmi_bus: qcom,spmi@c440000 {
+                       compatible = "qcom,spmi-pmic-arb";
+                       reg = <0xc440000 0xd00>,
+                               <0xc600000 0x2000000>,
+                               <0xe600000 0x100000>,
+                               <0xe700000 0xa0000>,
+                               <0xc40a000 0x26000>;
+                       reg-names = "core", "chnls", "obsrvr", "intr", "cnfg";
+                       interrupts-extended = <&pdc 1 IRQ_TYPE_LEVEL_HIGH>;
+                       interrupt-names = "periph_irq";
+                       interrupt-controller;
+                       #interrupt-cells = <4>;
+                       #address-cells = <2>;
+                       #size-cells = <0>;
+                       cell-index = <0>;
+                       qcom,channel = <0>;
+                       qcom,ee = <0>;
+               };
+
                tlmm: pinctrl@f100000 {
                        compatible = "qcom,sdx65-tlmm";
                        reg = <0xf100000 0x300000>;