mtd: spi-nor: Fix address width on flash chips > 16MB
authorBert Vermeulen <bert@biot.com>
Tue, 6 Oct 2020 13:23:46 +0000 (15:23 +0200)
committerVignesh Raghavendra <vigneshr@ti.com>
Wed, 28 Oct 2020 17:07:55 +0000 (22:37 +0530)
If a flash chip has more than 16MB capacity but its BFPT reports
BFPT_DWORD1_ADDRESS_BYTES_3_OR_4, the spi-nor framework defaults to 3.

The check in spi_nor_set_addr_width() doesn't catch it because addr_width
did get set. This fixes that check.

Fixes: f9acd7fa80be ("mtd: spi-nor: sfdp: default to addr_width of 3 for configurable widths")
Signed-off-by: Bert Vermeulen <bert@biot.com>
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Reviewed-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Reviewed-by: Pratyush Yadav <p.yadav@ti.com>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Tested-by: Joel Stanley <joel@jms.id.au>
Tested-by: Cédric Le Goater <clg@kaod.org>
Link: https://lore.kernel.org/r/20201006132346.12652-1-bert@biot.com
drivers/mtd/spi-nor/core.c

index b37d6c1936de10a446317e19c6b10055bcf15ef3..f0ae7a01703a1d7ac6d3ee699320360253b20577 100644 (file)
@@ -3008,13 +3008,15 @@ static int spi_nor_set_addr_width(struct spi_nor *nor)
                /* already configured from SFDP */
        } else if (nor->info->addr_width) {
                nor->addr_width = nor->info->addr_width;
-       } else if (nor->mtd.size > 0x1000000) {
-               /* enable 4-byte addressing if the device exceeds 16MiB */
-               nor->addr_width = 4;
        } else {
                nor->addr_width = 3;
        }
 
+       if (nor->addr_width == 3 && nor->mtd.size > 0x1000000) {
+               /* enable 4-byte addressing if the device exceeds 16MiB */
+               nor->addr_width = 4;
+       }
+
        if (nor->addr_width > SPI_NOR_MAX_ADDR_WIDTH) {
                dev_dbg(nor->dev, "address width is too large: %u\n",
                        nor->addr_width);