arm64: dts: qcom: sm8250: Add cpuidle states

This change adds various idle states and add devices to power domains.

Cc: devicetree@vger.kernel.org
Signed-off-by: Maulik Shah <quic_mkshah@quicinc.com>
Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/1641749107-31979-3-git-send-email-quic_mkshah@quicinc.com

diff --git a/arch/arm64/boot/dts/qcom/sm8250.dtsi b/arch/arm64/boot/dts/qcom/sm8250.dtsi
index 88cd82ed75b7abf4ad519bed59a62ab8f55139d1..3c92097324c3fa741ae881c6ffc7e2ff9f75fd63 100644 (file)
--- a/arch/arm64/boot/dts/qcom/sm8250.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8250.dtsi
@@ -98,6 +98,8 @@
                        capacity-dmips-mhz = <448>;
                        dynamic-power-coefficient = <205>;
                        next-level-cache = <&L2_0>;
+                       power-domains = <&CPU_PD0>;
+                       power-domain-names = "psci";
                        qcom,freq-domain = <&cpufreq_hw 0>;
                        operating-points-v2 = <&cpu0_opp_table>;
                        interconnects = <&gem_noc MASTER_AMPSS_M0 &mc_virt SLAVE_EBI_CH0>,
@@ -120,6 +122,8 @@
                        capacity-dmips-mhz = <448>;
                        dynamic-power-coefficient = <205>;
                        next-level-cache = <&L2_100>;
+                       power-domains = <&CPU_PD1>;
+                       power-domain-names = "psci";
                        qcom,freq-domain = <&cpufreq_hw 0>;
                        operating-points-v2 = <&cpu0_opp_table>;
                        interconnects = <&gem_noc MASTER_AMPSS_M0 &mc_virt SLAVE_EBI_CH0>,
@@ -139,6 +143,8 @@
                        capacity-dmips-mhz = <448>;
                        dynamic-power-coefficient = <205>;
                        next-level-cache = <&L2_200>;
+                       power-domains = <&CPU_PD2>;
+                       power-domain-names = "psci";
                        qcom,freq-domain = <&cpufreq_hw 0>;
                        operating-points-v2 = <&cpu0_opp_table>;
                        interconnects = <&gem_noc MASTER_AMPSS_M0 &mc_virt SLAVE_EBI_CH0>,
@@ -158,6 +164,8 @@
                        capacity-dmips-mhz = <448>;
                        dynamic-power-coefficient = <205>;
                        next-level-cache = <&L2_300>;
+                       power-domains = <&CPU_PD3>;
+                       power-domain-names = "psci";
                        qcom,freq-domain = <&cpufreq_hw 0>;
                        operating-points-v2 = <&cpu0_opp_table>;
                        interconnects = <&gem_noc MASTER_AMPSS_M0 &mc_virt SLAVE_EBI_CH0>,
@@ -177,6 +185,8 @@
                        capacity-dmips-mhz = <1024>;
                        dynamic-power-coefficient = <379>;
                        next-level-cache = <&L2_400>;
+                       power-domains = <&CPU_PD4>;
+                       power-domain-names = "psci";
                        qcom,freq-domain = <&cpufreq_hw 1>;
                        operating-points-v2 = <&cpu4_opp_table>;
                        interconnects = <&gem_noc MASTER_AMPSS_M0 &mc_virt SLAVE_EBI_CH0>,
@@ -196,6 +206,8 @@
                        capacity-dmips-mhz = <1024>;
                        dynamic-power-coefficient = <379>;
                        next-level-cache = <&L2_500>;
+                       power-domains = <&CPU_PD5>;
+                       power-domain-names = "psci";
                        qcom,freq-domain = <&cpufreq_hw 1>;
                        operating-points-v2 = <&cpu4_opp_table>;
                        interconnects = <&gem_noc MASTER_AMPSS_M0 &mc_virt SLAVE_EBI_CH0>,
@@ -216,6 +228,8 @@
                        capacity-dmips-mhz = <1024>;
                        dynamic-power-coefficient = <379>;
                        next-level-cache = <&L2_600>;
+                       power-domains = <&CPU_PD6>;
+                       power-domain-names = "psci";
                        qcom,freq-domain = <&cpufreq_hw 1>;
                        operating-points-v2 = <&cpu4_opp_table>;
                        interconnects = <&gem_noc MASTER_AMPSS_M0 &mc_virt SLAVE_EBI_CH0>,
@@ -235,6 +249,8 @@
                        capacity-dmips-mhz = <1024>;
                        dynamic-power-coefficient = <444>;
                        next-level-cache = <&L2_700>;
+                       power-domains = <&CPU_PD7>;
+                       power-domain-names = "psci";
                        qcom,freq-domain = <&cpufreq_hw 2>;
                        operating-points-v2 = <&cpu7_opp_table>;
                        interconnects = <&gem_noc MASTER_AMPSS_M0 &mc_virt SLAVE_EBI_CH0>,
@@ -281,6 +297,42 @@
                                };
                        };
                };
+
+               idle-states {
+                       entry-method = "psci";
+
+                       LITTLE_CPU_SLEEP_0: cpu-sleep-0-0 {
+                               compatible = "arm,idle-state";
+                               idle-state-name = "silver-rail-power-collapse";
+                               arm,psci-suspend-param = <0x40000004>;
+                               entry-latency-us = <360>;
+                               exit-latency-us = <531>;
+                               min-residency-us = <3934>;
+                               local-timer-stop;
+                       };
+
+                       BIG_CPU_SLEEP_0: cpu-sleep-1-0 {
+                               compatible = "arm,idle-state";
+                               idle-state-name = "gold-rail-power-collapse";
+                               arm,psci-suspend-param = <0x40000004>;
+                               entry-latency-us = <702>;
+                               exit-latency-us = <1061>;
+                               min-residency-us = <4488>;
+                               local-timer-stop;
+                       };
+               };
+
+               domain-idle-states {
+                       CLUSTER_SLEEP_0: cluster-sleep-0 {
+                               compatible = "domain-idle-state";
+                               idle-state-name = "cluster-llcc-off";
+                               arm,psci-suspend-param = <0x4100c244>;
+                               entry-latency-us = <3264>;
+                               exit-latency-us = <6562>;
+                               min-residency-us = <9987>;
+                               local-timer-stop;
+                       };
+               };
        };
 
        cpu0_opp_table: cpu0_opp_table {
@@ -594,6 +646,59 @@
        psci {
                compatible = "arm,psci-1.0";
                method = "smc";
+
+               CPU_PD0: cpu0 {
+                       #power-domain-cells = <0>;
+                       power-domains = <&CLUSTER_PD>;
+                       domain-idle-states = <&LITTLE_CPU_SLEEP_0>;
+               };
+
+               CPU_PD1: cpu1 {
+                       #power-domain-cells = <0>;
+                       power-domains = <&CLUSTER_PD>;
+                       domain-idle-states = <&LITTLE_CPU_SLEEP_0>;
+               };
+
+               CPU_PD2: cpu2 {
+                       #power-domain-cells = <0>;
+                       power-domains = <&CLUSTER_PD>;
+                       domain-idle-states = <&LITTLE_CPU_SLEEP_0>;
+               };
+
+               CPU_PD3: cpu3 {
+                       #power-domain-cells = <0>;
+                       power-domains = <&CLUSTER_PD>;
+                       domain-idle-states = <&LITTLE_CPU_SLEEP_0>;
+               };
+
+               CPU_PD4: cpu4 {
+                       #power-domain-cells = <0>;
+                       power-domains = <&CLUSTER_PD>;
+                       domain-idle-states = <&BIG_CPU_SLEEP_0>;
+               };
+
+               CPU_PD5: cpu5 {
+                       #power-domain-cells = <0>;
+                       power-domains = <&CLUSTER_PD>;
+                       domain-idle-states = <&BIG_CPU_SLEEP_0>;
+               };
+
+               CPU_PD6: cpu6 {
+                       #power-domain-cells = <0>;
+                       power-domains = <&CLUSTER_PD>;
+                       domain-idle-states = <&BIG_CPU_SLEEP_0>;
+               };
+
+               CPU_PD7: cpu7 {
+                       #power-domain-cells = <0>;
+                       power-domains = <&CLUSTER_PD>;
+                       domain-idle-states = <&BIG_CPU_SLEEP_0>;
+               };
+
+               CLUSTER_PD: cpu-cluster0 {
+                       #power-domain-cells = <0>;
+                       domain-idle-states = <&CLUSTER_SLEEP_0>;
+               };
        };
 
        reserved-memory {