dev_dbg(pwmchip_parent(chip), "fin_freq: %ld Hz\n", fin_freq);
 
-       cnt = div_u64(fin_freq * period, NSEC_PER_SEC);
+       cnt = mul_u64_u64_div_u64(fin_freq, period, NSEC_PER_SEC);
        if (cnt > 0xffff) {
                dev_err(pwmchip_parent(chip), "unable to get period cnt\n");
                return -EINVAL;
                channel->hi = 0;
                channel->lo = cnt;
        } else {
-               duty_cnt = div_u64(fin_freq * duty, NSEC_PER_SEC);
+               duty_cnt = mul_u64_u64_div_u64(fin_freq, duty, NSEC_PER_SEC);
 
                dev_dbg(pwmchip_parent(chip), "duty=%llu duty_cnt=%u\n", duty, duty_cnt);