arm64: dts: imx8mq-sr-som: Align pin configuration group names with schema

Device tree schema expects pin configuration groups to end with 'grp'
suffix, otherwise dtbs_check complain with a warning like:

    ... do not match any of the regexes: 'grp$', 'pinctrl-[0-9]+'

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

diff --git a/arch/arm64/boot/dts/freescale/imx8mq-sr-som.dtsi b/arch/arm64/boot/dts/freescale/imx8mq-sr-som.dtsi
index 404c46671b963b01a4b978ee241c118445e25f8b..0187890a90c5edfcd3d9911f721097b874750133 100644 (file)
--- a/arch/arm64/boot/dts/freescale/imx8mq-sr-som.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mq-sr-som.dtsi
@@ -275,7 +275,7 @@
                >;
        };
 
-       pinctrl_usdhc1_100mhz: usdhc1grp100mhz {
+       pinctrl_usdhc1_100mhz: usdhc1-100mhzgrp {
                fsl,pins = <
                        MX8MQ_IOMUXC_SD1_CLK_USDHC1_CLK                 0x8d
                        MX8MQ_IOMUXC_SD1_CMD_USDHC1_CMD                 0xcd
@@ -292,7 +292,7 @@
                >;
        };
 
-       pinctrl_usdhc1_200mhz: usdhc1grp200mhz {
+       pinctrl_usdhc1_200mhz: usdhc1-200mhzgrp {
                fsl,pins = <
                        MX8MQ_IOMUXC_SD1_CLK_USDHC1_CLK                 0x9f
                        MX8MQ_IOMUXC_SD1_CMD_USDHC1_CMD                 0xdf