soc/tegra: pmc: Disable PMC state syncing

Disable PMC state syncing in order to ensure that we won't break older
kernels once device-trees will be updated with the addition of the power
domains. This also allows to apply device-tree PM patches independently
from the driver patches.

Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>

diff --git a/drivers/soc/tegra/pmc.c b/drivers/soc/tegra/pmc.c
index 50091c4ec94812f9961f4885c9b45ca2151b58dc..fb8faf7b226ab309ec3c7be58eb38f4e0ce4eefb 100644 (file)
--- a/drivers/soc/tegra/pmc.c
+++ b/drivers/soc/tegra/pmc.c
@@ -360,6 +360,7 @@ struct tegra_pmc_soc {
        unsigned int num_pmc_clks;
        bool has_blink_output;
        bool has_usb_sleepwalk;
+       bool supports_core_domain;
 };
 
 /**
@@ -3041,6 +3042,7 @@ static void tegra20_pmc_setup_irq_polarity(struct tegra_pmc *pmc,
 }
 
 static const struct tegra_pmc_soc tegra20_pmc_soc = {
+       .supports_core_domain = false,
        .num_powergates = ARRAY_SIZE(tegra20_powergates),
        .powergates = tegra20_powergates,
        .num_cpu_powergates = 0,
@@ -3101,6 +3103,7 @@ static const char * const tegra30_reset_sources[] = {
 };
 
 static const struct tegra_pmc_soc tegra30_pmc_soc = {
+       .supports_core_domain = false,
        .num_powergates = ARRAY_SIZE(tegra30_powergates),
        .powergates = tegra30_powergates,
        .num_cpu_powergates = ARRAY_SIZE(tegra30_cpu_powergates),
@@ -3157,6 +3160,7 @@ static const u8 tegra114_cpu_powergates[] = {
 };
 
 static const struct tegra_pmc_soc tegra114_pmc_soc = {
+       .supports_core_domain = false,
        .num_powergates = ARRAY_SIZE(tegra114_powergates),
        .powergates = tegra114_powergates,
        .num_cpu_powergates = ARRAY_SIZE(tegra114_cpu_powergates),
@@ -3273,6 +3277,7 @@ static const struct pinctrl_pin_desc tegra124_pin_descs[] = {
 };
 
 static const struct tegra_pmc_soc tegra124_pmc_soc = {
+       .supports_core_domain = false,
        .num_powergates = ARRAY_SIZE(tegra124_powergates),
        .powergates = tegra124_powergates,
        .num_cpu_powergates = ARRAY_SIZE(tegra124_cpu_powergates),
@@ -3398,6 +3403,7 @@ static const struct tegra_wake_event tegra210_wake_events[] = {
 };
 
 static const struct tegra_pmc_soc tegra210_pmc_soc = {
+       .supports_core_domain = false,
        .num_powergates = ARRAY_SIZE(tegra210_powergates),
        .powergates = tegra210_powergates,
        .num_cpu_powergates = ARRAY_SIZE(tegra210_cpu_powergates),
@@ -3555,6 +3561,7 @@ static const struct tegra_wake_event tegra186_wake_events[] = {
 };
 
 static const struct tegra_pmc_soc tegra186_pmc_soc = {
+       .supports_core_domain = false,
        .num_powergates = 0,
        .powergates = NULL,
        .num_cpu_powergates = 0,
@@ -3689,6 +3696,7 @@ static const struct tegra_wake_event tegra194_wake_events[] = {
 };
 
 static const struct tegra_pmc_soc tegra194_pmc_soc = {
+       .supports_core_domain = false,
        .num_powergates = 0,
        .powergates = NULL,
        .num_cpu_powergates = 0,
@@ -3757,6 +3765,7 @@ static const char * const tegra234_reset_sources[] = {
 };
 
 static const struct tegra_pmc_soc tegra234_pmc_soc = {
+       .supports_core_domain = false,
        .num_powergates = 0,
        .powergates = NULL,
        .num_cpu_powergates = 0,
@@ -3803,6 +3812,14 @@ static void tegra_pmc_sync_state(struct device *dev)
 {
        int err;
 
+       /*
+        * Newer device-trees have power domains, but we need to prepare all
+        * device drivers with runtime PM and OPP support first, otherwise
+        * state syncing is unsafe.
+        */
+       if (!pmc->soc->supports_core_domain)
+               return;
+
        /*
         * Older device-trees don't have core PD, and thus, there are
         * no dependencies that will block the state syncing. We shouldn't