};
 
                sdhc2: sdhci@74a4900 {
-                        status = "disabled";
-                        compatible = "qcom,sdhci-msm-v4";
-                        reg = <0x074a4900 0x314>, <0x074a4000 0x800>;
-                        reg-names = "hc_mem", "core_mem";
-
-                        interrupts = <0 125 IRQ_TYPE_LEVEL_HIGH>,
-                                     <0 221 IRQ_TYPE_LEVEL_HIGH>;
-                        interrupt-names = "hc_irq", "pwr_irq";
-
-                        clock-names = "iface", "core", "xo";
-                        clocks = <&gcc GCC_SDCC2_AHB_CLK>,
-                        <&gcc GCC_SDCC2_APPS_CLK>,
-                        <&xo_board>;
-                        bus-width = <4>;
+                       compatible = "qcom,sdhci-msm-v4";
+                       reg = <0x074a4900 0x314>, <0x074a4000 0x800>;
+                       reg-names = "hc_mem", "core_mem";
+
+                       interrupts = <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
+                                     <GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>;
+                       interrupt-names = "hc_irq", "pwr_irq";
+
+                       clock-names = "iface", "core", "xo";
+                       clocks = <&gcc GCC_SDCC2_AHB_CLK>,
+                               <&gcc GCC_SDCC2_APPS_CLK>,
+                               <&xo_board>;
+
+                       pinctrl-names = "default", "sleep";
+                       pinctrl-0 = <&sdc2_state_on>;
+                       pinctrl-1 = <&sdc2_state_off>;
+
+                       bus-width = <4>;
+                       status = "disabled";
                 };
 
                blsp1_uart2: serial@7570000 {