arm64: add FEAT_LRCPC3 HWCAP
authorJoey Gouly <joey.gouly@arm.com>
Tue, 19 Sep 2023 16:27:56 +0000 (17:27 +0100)
committerCatalin Marinas <catalin.marinas@arm.com>
Fri, 13 Oct 2023 18:11:35 +0000 (19:11 +0100)
FEAT_LRCPC3 adds more instructions to support the Release Consistency model.
Add a HWCAP so that userspace can make decisions about instructions it can use.

Signed-off-by: Joey Gouly <joey.gouly@arm.com>
Cc: Will Deacon <will@kernel.org>
Link: https://lore.kernel.org/r/20230919162757.2707023-2-joey.gouly@arm.com
[catalin.marinas@arm.com: change the HWCAP number]
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Documentation/arch/arm64/elf_hwcaps.rst
arch/arm64/include/asm/hwcap.h
arch/arm64/include/uapi/asm/hwcap.h
arch/arm64/kernel/cpufeature.c
arch/arm64/kernel/cpuinfo.c
arch/arm64/tools/sysreg

index 2ad0a369d96a980b24f534ca6b31fe473dafeca0..a453f8430f7f90a8378b2fdc430f25c24d1715a9 100644 (file)
@@ -311,6 +311,9 @@ HWCAP2_HBC
 HWCAP2_SVE_B16B16
     Functionality implied by ID_AA64ZFR0_EL1.B16B16 == 0b0001.
 
+HWCAP2_LRCPC3
+    Functionality implied by ID_AA64ISAR1_EL1.LRCPC == 0b0011.
+
 4. Unused AT_HWCAP bits
 -----------------------
 
index 210a41f8b10a98c905a934ad1e0688bd574aedf4..1c65f10619a08e3a6f66396b6f5c32be7b339711 100644 (file)
 #define KERNEL_HWCAP_MOPS              __khwcap2_feature(MOPS)
 #define KERNEL_HWCAP_HBC               __khwcap2_feature(HBC)
 #define KERNEL_HWCAP_SVE_B16B16                __khwcap2_feature(SVE_B16B16)
+#define KERNEL_HWCAP_LRCPC3            __khwcap2_feature(LRCPC3)
 
 /*
  * This yields a mask that user programs can use to figure out what
index 6faf549077c57d349d292b254d40ac60b177fb52..0f37944e98b6d1c1ede85f0f6c27b19d6360b0b5 100644 (file)
 #define HWCAP2_MOPS            (1UL << 43)
 #define HWCAP2_HBC             (1UL << 44)
 #define HWCAP2_SVE_B16B16      (1UL << 45)
+#define HWCAP2_LRCPC3          (1UL << 46)
 
 #endif /* _UAPI__ASM_HWCAP_H */
index a013dfd5b6e90f33775fe7e0e4821056a326819d..a839342910379bf3bdd012744fd3ee5e31c34bf1 100644 (file)
@@ -2809,6 +2809,7 @@ static const struct arm64_cpu_capabilities arm64_elf_hwcaps[] = {
        HWCAP_CAP(ID_AA64ISAR1_EL1, FCMA, IMP, CAP_HWCAP, KERNEL_HWCAP_FCMA),
        HWCAP_CAP(ID_AA64ISAR1_EL1, LRCPC, IMP, CAP_HWCAP, KERNEL_HWCAP_LRCPC),
        HWCAP_CAP(ID_AA64ISAR1_EL1, LRCPC, LRCPC2, CAP_HWCAP, KERNEL_HWCAP_ILRCPC),
+       HWCAP_CAP(ID_AA64ISAR1_EL1, LRCPC, LRCPC3, CAP_HWCAP, KERNEL_HWCAP_LRCPC3),
        HWCAP_CAP(ID_AA64ISAR1_EL1, FRINTTS, IMP, CAP_HWCAP, KERNEL_HWCAP_FRINT),
        HWCAP_CAP(ID_AA64ISAR1_EL1, SB, IMP, CAP_HWCAP, KERNEL_HWCAP_SB),
        HWCAP_CAP(ID_AA64ISAR1_EL1, BF16, IMP, CAP_HWCAP, KERNEL_HWCAP_BF16),
index ea2a319881036b55f6b262f73e50d1fde0ef81fa..0ba7e6cd8fee344702a296f789b5b2b3b551cb37 100644 (file)
@@ -128,6 +128,7 @@ static const char *const hwcap_str[] = {
        [KERNEL_HWCAP_MOPS]             = "mops",
        [KERNEL_HWCAP_HBC]              = "hbc",
        [KERNEL_HWCAP_SVE_B16B16]       = "sveb16b16",
+       [KERNEL_HWCAP_LRCPC3]           = "lrcpc3",
 };
 
 #ifdef CONFIG_COMPAT
index bb69ab34202b029621373f240e31f1e4605d396d..4794556e67e935637741e6d479449d59ec82e86c 100644 (file)
@@ -1309,6 +1309,7 @@ UnsignedEnum      23:20   LRCPC
        0b0000  NI
        0b0001  IMP
        0b0010  LRCPC2
+       0b0011  LRCPC3
 EndEnum
 UnsignedEnum   19:16   FCMA
        0b0000  NI