ARM: tegra: paz00: Add emc-tables for ram-code 1
authorNicolas Chauvet <kwizart@gmail.com>
Thu, 22 Feb 2024 20:21:42 +0000 (21:21 +0100)
committerThierry Reding <treding@nvidia.com>
Fri, 26 Apr 2024 15:14:35 +0000 (17:14 +0200)
The same table as ram-code 0 operates correctly on ram-code 1

v2: rebase on current kernel

Signed-off-by: Nicolas Chauvet <kwizart@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
arch/arm/boot/dts/nvidia/tegra20-paz00.dts

index afb922bd79a713c39a32a76ac9188d5d900f8122..1408e1e007596e6ce5fda3620e1c67c64b8037c4 100644 (file)
                                        0x00000000 0x00000000 0x00000000 0x00000000>;
                        };
                };
+
+               emc-tables@1 {
+                       nvidia,ram-code = <0x1>;
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       reg = <1>;
+
+                       emc-table@166500 {
+                               reg = <166500>;
+                               compatible = "nvidia,tegra20-emc-table";
+                               clock-frequency = <166500>;
+                               nvidia,emc-registers = <0x0000000a 0x00000016
+                                       0x00000008 0x00000003 0x00000004 0x00000004
+                                       0x00000002 0x0000000c 0x00000003 0x00000003
+                                       0x00000002 0x00000001 0x00000004 0x00000005
+                                       0x00000004 0x00000009 0x0000000d 0x000004df
+                                       0x00000000 0x00000003 0x00000003 0x00000003
+                                       0x00000003 0x00000001 0x0000000a 0x000000c8
+                                       0x00000003 0x00000006 0x00000004 0x00000008
+                                       0x00000002 0x00000000 0x00000000 0x00000002
+                                       0x00000000 0x00000000 0x00000083 0xe03b0323
+                                       0x007fe010 0x00001414 0x00000000 0x00000000
+                                       0x00000000 0x00000000 0x00000000 0x00000000>;
+                       };
+
+                       emc-table@333000 {
+                               reg = <333000>;
+                               compatible = "nvidia,tegra20-emc-table";
+                               clock-frequency = <333000>;
+                               nvidia,emc-registers = <0x00000018 0x00000033
+                                       0x00000012 0x00000004 0x00000004 0x00000005
+                                       0x00000003 0x0000000c 0x00000006 0x00000006
+                                       0x00000003 0x00000001 0x00000004 0x00000005
+                                       0x00000004 0x00000009 0x0000000d 0x00000bff
+                                       0x00000000 0x00000003 0x00000003 0x00000006
+                                       0x00000006 0x00000001 0x00000011 0x000000c8
+                                       0x00000003 0x0000000e 0x00000007 0x00000008
+                                       0x00000002 0x00000000 0x00000000 0x00000002
+                                       0x00000000 0x00000000 0x00000083 0xf0440303
+                                       0x007fe010 0x00001414 0x00000000 0x00000000
+                                       0x00000000 0x00000000 0x00000000 0x00000000>;
+                       };
+               };
        };
 
        usb@c5000000 {