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Don't kill the registered irqs on reset.
author
ths
<ths@c046a42c-6fe2-441c-8c8c-71466251a162>
Thu, 31 May 2007 16:18:58 +0000
(16:18 +0000)
committer
ths
<ths@c046a42c-6fe2-441c-8c8c-71466251a162>
Thu, 31 May 2007 16:18:58 +0000
(16:18 +0000)
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2903
c046a42c
-6fe2-441c-8c8c-
71466251a162
target-mips/cpu.h
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diff --git
a/target-mips/cpu.h
b/target-mips/cpu.h
index 9fa0ca8c6cda454d544f38bc8b1a621aa96486bf..6dff8ef557596abf11208db2bd819611c89988dc 100644
(file)
--- a/
target-mips/cpu.h
+++ b/
target-mips/cpu.h
@@
-284,10
+284,8
@@
struct CPUMIPSState {
int CCRes; /* Cycle count resolution/divisor */
int Status_rw_bitmask; /* Read/write bits in CP0_Status */
-#if
defined(CONFIG_USER_ONLY)
+#if
def CONFIG_USER_ONLY
target_ulong tls_value;
-#else
- void *irq[8];
#endif
CPU_COMMON
@@
-298,6
+296,9
@@
struct CPUMIPSState {
const char *initrd_filename;
mips_def_t *cpu_model;
+#ifndef CONFIG_USER_ONLY
+ void *irq[8];
+#endif
struct QEMUTimer *timer; /* Internal timer */
};