drm/mediatek: dp: Add support MT8188 dp/edp function

Add support MT8188 dp/edp function

Signed-off-by: Shuijing Li <shuijing.li@mediatek.com>
Reviewed-by: CK Hu <ck.hu@mediatek.com>
Link: https://patchwork.kernel.org/project/dri-devel/patch/20230822024155.26670-5-shuijing.li@mediatek.com/
Signed-off-by: Chun-Kuang Hu <chunkuang.hu@kernel.org>

diff --git a/drivers/gpu/drm/mediatek/mtk_dp.c b/drivers/gpu/drm/mediatek/mtk_dp.c
index 5fd6f3972140a3ec6d7710dad4db5a55a3e298cd..93f6f8efabd6ce5ea933cac6d0a3a0fcf6ea0957 100644 (file)
--- a/drivers/gpu/drm/mediatek/mtk_dp.c
+++ b/drivers/gpu/drm/mediatek/mtk_dp.c
@@ -2751,6 +2751,15 @@ static int mtk_dp_resume(struct device *dev)
 
 static SIMPLE_DEV_PM_OPS(mtk_dp_pm_ops, mtk_dp_suspend, mtk_dp_resume);
 
+static const struct mtk_dp_data mt8188_dp_data = {
+       .bridge_type = DRM_MODE_CONNECTOR_DisplayPort,
+       .smc_cmd = MTK_DP_SIP_ATF_VIDEO_UNMUTE,
+       .efuse_fmt = mt8195_dp_efuse_fmt,
+       .audio_supported = true,
+       .audio_pkt_in_hblank_area = true,
+       .audio_m_div2_bit = MT8188_AUDIO_M_CODE_MULT_DIV_SEL_DP_ENC0_P0_DIV_2,
+};
+
 static const struct mtk_dp_data mt8195_edp_data = {
        .bridge_type = DRM_MODE_CONNECTOR_eDP,
        .smc_cmd = MTK_DP_SIP_ATF_EDP_VIDEO_UNMUTE,
@@ -2768,6 +2777,14 @@ static const struct mtk_dp_data mt8195_dp_data = {
 };
 
 static const struct of_device_id mtk_dp_of_match[] = {
+       {
+               .compatible = "mediatek,mt8188-edp-tx",
+               .data = &mt8195_edp_data,
+       },
+       {
+               .compatible = "mediatek,mt8188-dp-tx",
+               .data = &mt8188_dp_data,
+       },
        {
                .compatible = "mediatek,mt8195-edp-tx",
                .data = &mt8195_edp_data,

diff --git a/drivers/gpu/drm/mediatek/mtk_dp_reg.h b/drivers/gpu/drm/mediatek/mtk_dp_reg.h
index b9859ef067ce1e8bf3a164f85360e48c58a5cecf..709b79480693da4bb39091f6e7c32c2e54717ed7 100644 (file)
--- a/drivers/gpu/drm/mediatek/mtk_dp_reg.h
+++ b/drivers/gpu/drm/mediatek/mtk_dp_reg.h
@@ -165,6 +165,12 @@
 #define MT8195_AUDIO_M_CODE_MULT_DIV_SEL_DP_ENC0_P0_DIV_2      (5 << 8)
 #define MT8195_AUDIO_M_CODE_MULT_DIV_SEL_DP_ENC0_P0_DIV_4      (6 << 8)
 #define MT8195_AUDIO_M_CODE_MULT_DIV_SEL_DP_ENC0_P0_DIV_8      (7 << 8)
+#define MT8188_AUDIO_M_CODE_MULT_DIV_SEL_DP_ENC0_P0_MUL_2      (1 << 8)
+#define MT8188_AUDIO_M_CODE_MULT_DIV_SEL_DP_ENC0_P0_MUL_4      (2 << 8)
+#define MT8188_AUDIO_M_CODE_MULT_DIV_SEL_DP_ENC0_P0_MUL_8      (3 << 8)
+#define MT8188_AUDIO_M_CODE_MULT_DIV_SEL_DP_ENC0_P0_DIV_2      (4 << 8)
+#define MT8188_AUDIO_M_CODE_MULT_DIV_SEL_DP_ENC0_P0_DIV_4      (5 << 8)
+#define MT8188_AUDIO_M_CODE_MULT_DIV_SEL_DP_ENC0_P0_DIV_8      (7 << 8)
 #define MTK_DP_ENC0_P0_30D8                    0x30d8
 #define MTK_DP_ENC0_P0_312C                    0x312c
 #define ASP_HB2_DP_ENC0_P0_MASK                                GENMASK(7, 0)