static void do_v7m_exception_exit(ARMCPU *cpu)
{
CPUARMState *env = &cpu->env;
- uint32_t type;
+ uint32_t excret;
uint32_t xpsr;
bool ufault = false;
bool return_to_sp_process = false;
* the target value up between env->regs[15] and env->thumb in
* gen_bx(). Reconstitute it.
*/
- type = env->regs[15];
+ excret = env->regs[15];
if (env->thumb) {
- type |= 1;
+ excret |= 1;
}
qemu_log_mask(CPU_LOG_INT, "Exception return: magic PC %" PRIx32
" previous exception %d\n",
- type, env->v7m.exception);
+ excret, env->v7m.exception);
- if ((type & R_V7M_EXCRET_RES1_MASK) != R_V7M_EXCRET_RES1_MASK) {
+ if ((excret & R_V7M_EXCRET_RES1_MASK) != R_V7M_EXCRET_RES1_MASK) {
qemu_log_mask(LOG_GUEST_ERROR, "M profile: zero high bits in exception "
- "exit PC value 0x%" PRIx32 " are UNPREDICTABLE\n", type);
+ "exit PC value 0x%" PRIx32 " are UNPREDICTABLE\n",
+ excret);
}
if (env->v7m.exception != ARMV7M_EXCP_NMI) {
* which security state's faultmask to clear. (v8M ARM ARM R_KBNF.)
*/
if (arm_feature(env, ARM_FEATURE_M_SECURITY)) {
- int es = type & R_V7M_EXCRET_ES_MASK;
+ int es = excret & R_V7M_EXCRET_ES_MASK;
if (armv7m_nvic_raw_execution_priority(env->nvic) >= 0) {
env->v7m.faultmask[es] = 0;
}
g_assert_not_reached();
}
- switch (type & 0xf) {
+ switch (excret & 0xf) {
case 1: /* Return to Handler */
return_to_handler = true;
break;
*/
env->v7m.cfsr[env->v7m.secure] |= R_V7M_CFSR_INVPC_MASK;
armv7m_nvic_set_pending(env->nvic, ARMV7M_EXCP_USAGE);
- v7m_exception_taken(cpu, type);
+ v7m_exception_taken(cpu, excret);
qemu_log_mask(CPU_LOG_INT, "...taking UsageFault on existing "
"stackframe: failed exception return integrity check\n");
return;
/* The restored xPSR exception field will be zero if we're
* resuming in Thread mode. If that doesn't match what the
- * exception return type specified then this is a UsageFault.
+ * exception return excret specified then this is a UsageFault.
*/
if (return_to_handler != arm_v7m_is_handler_mode(env)) {
/* Take an INVPC UsageFault by pushing the stack again. */
armv7m_nvic_set_pending(env->nvic, ARMV7M_EXCP_USAGE);
env->v7m.cfsr[env->v7m.secure] |= R_V7M_CFSR_INVPC_MASK;
v7m_push_stack(cpu);
- v7m_exception_taken(cpu, type);
+ v7m_exception_taken(cpu, excret);
qemu_log_mask(CPU_LOG_INT, "...taking UsageFault on new stackframe: "
"failed exception return integrity check\n");
return;